llvm-6502/test/CodeGen
Oliver Stannard e2948385b9 ARM: HFAs must be passed in consecutive registers
When using the ARM AAPCS, HFAs (Homogeneous Floating-point Aggregates) must
be passed in a block of consecutive floating-point registers, or on the stack.
This means that unused floating-point registers cannot be back-filled with
part of an HFA, however this can currently happen. This patch, along with the
corresponding clang patch (http://reviews.llvm.org/D3083) prevents this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208413 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-09 14:01:47 +00:00
..
AArch64 AArch64/ARM64: optimise vector selects & enable test 2014-05-07 14:10:27 +00:00
ARM ARM: HFAs must be passed in consecutive registers 2014-05-09 14:01:47 +00:00
ARM64 [ARM64-BE] Teach fast-isel about how to set up sub-word stack arguments for big endian calls. 2014-05-08 12:53:50 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips][mips64r6] Add experimental support for MIPS32r6 and MIPS64r6 2014-05-09 09:46:21 +00:00
MSP430
NVPTX
PowerPC
R600
SPARC
SystemZ
Thumb
Thumb2
X86 Optimize shufflevector that copies an i64/f64 and zeros the rest. 2014-05-08 23:16:08 +00:00
XCore