mirror of
https://github.com/c64scene-ar/llvm-6502.git
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e2948385b9
When using the ARM AAPCS, HFAs (Homogeneous Floating-point Aggregates) must be passed in a block of consecutive floating-point registers, or on the stack. This means that unused floating-point registers cannot be back-filled with part of an HFA, however this can currently happen. This patch, along with the corresponding clang patch (http://reviews.llvm.org/D3083) prevents this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208413 91177308-0d34-0410-b5e6-96231b3b80d8
164 lines
3.2 KiB
LLVM
164 lines
3.2 KiB
LLVM
; RUN: llc < %s -float-abi=hard -debug-only arm-isel 2>&1 | FileCheck %s
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; RUN: llc < %s -float-abi=soft -debug-only arm-isel 2>&1 | FileCheck %s --check-prefix=SOFT
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64"
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target triple = "armv7-none--eabi"
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; SOFT-NOT: isHA
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; CHECK: isHA: 1 { float }
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define void @f0b({ float } %a) {
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ret void
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}
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; CHECK: isHA: 1 { float, float }
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define void @f1({ float, float } %a) {
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ret void
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}
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; CHECK: isHA: 1 { float, float, float }
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define void @f1b({ float, float, float } %a) {
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ret void
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}
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; CHECK: isHA: 1 { float, float, float, float }
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define void @f1c({ float, float, float, float } %a) {
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ret void
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}
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; CHECK: isHA: 0 { float, float, float, float, float }
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define void @f2({ float, float, float, float, float } %a) {
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ret void
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}
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; CHECK: isHA: 1 { double }
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define void @f3({ double } %a) {
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ret void
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}
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; CHECK: isHA: 1 { double, double, double, double }
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define void @f4({ double, double, double, double } %a) {
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ret void
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}
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; CHECK: isHA: 0 { double, double, double, double, double }
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define void @f5({ double, double, double, double, double } %a) {
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ret void
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}
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; CHECK: isHA: 0 { i32, i32 }
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define void @f5b({ i32, i32 } %a) {
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ret void
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}
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; CHECK: isHA: 1 { [1 x float] }
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define void @f6({ [1 x float] } %a) {
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ret void
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}
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; CHECK: isHA: 1 { [4 x float] }
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define void @f7({ [4 x float] } %a) {
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ret void
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}
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; CHECK: isHA: 0 { [5 x float] }
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define void @f8({ [5 x float] } %a) {
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ret void
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}
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; CHECK: isHA: 1 [1 x float]
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define void @f6b([1 x float] %a) {
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ret void
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}
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; CHECK: isHA: 1 [4 x float]
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define void @f7b([4 x float] %a) {
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ret void
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}
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; CHECK: isHA: 0 [5 x float]
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define void @f8b([5 x float] %a) {
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ret void
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}
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; CHECK: isHA: 1 { [2 x float], [2 x float] }
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define void @f9({ [2 x float], [2 x float] } %a) {
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ret void
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}
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; CHECK: isHA: 1 { [1 x float], [3 x float] }
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define void @f9b({ [1 x float], [3 x float] } %a) {
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ret void
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}
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; CHECK: isHA: 0 { [3 x float], [3 x float] }
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define void @f10({ [3 x float], [3 x float] } %a) {
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ret void
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}
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; CHECK: isHA: 1 { <2 x float> }
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define void @f11({ <2 x float> } %a) {
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ret void
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}
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; CHECK: isHA: 0 { <3 x float> }
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define void @f12({ <3 x float> } %a) {
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ret void
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}
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; CHECK: isHA: 1 { <4 x float> }
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define void @f13({ <4 x float> } %a) {
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ret void
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}
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; CHECK: isHA: 1 { <2 x float>, <2 x float> }
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define void @f15({ <2 x float>, <2 x float> } %a) {
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ret void
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}
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; CHECK: isHA: 0 { <2 x float>, float }
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define void @f15b({ <2 x float>, float } %a) {
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ret void
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}
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; CHECK: isHA: 0 { <2 x float>, [2 x float] }
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define void @f15c({ <2 x float>, [2 x float] } %a) {
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ret void
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}
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; CHECK: isHA: 0 { <2 x float>, <4 x float> }
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define void @f16({ <2 x float>, <4 x float> } %a) {
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ret void
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}
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; CHECK: isHA: 1 { <2 x double> }
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define void @f17({ <2 x double> } %a) {
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ret void
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}
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; CHECK: isHA: 1 { <2 x i32> }
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define void @f18({ <2 x i32> } %a) {
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ret void
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}
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; CHECK: isHA: 1 { <2 x i64>, <4 x i32> }
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define void @f19({ <2 x i64>, <4 x i32> } %a) {
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ret void
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}
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; CHECK: isHA: 1 { [4 x <4 x float>] }
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define void @f20({ [4 x <4 x float>] } %a) {
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ret void
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}
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; CHECK: isHA: 0 { [5 x <4 x float>] }
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define void @f21({ [5 x <4 x float>] } %a) {
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ret void
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}
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; CHECK-NOT: isHA
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define void @f22({ float } %a, ...) {
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ret void
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}
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