llvm-6502/test/CodeGen
Tim Northover 7b837d8c75 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00
..
AArch64
ARM
ARM64 ARM64: initial backend import 2014-03-29 10:18:08 +00:00
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC [PowerPC] Add subregister classes for f64 VSX values 2014-03-29 05:29:01 +00:00
R600 R600: Implement isZExtFree. 2014-03-27 17:23:31 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86 [x86] Fix printing of register operands with q modifier. 2014-03-28 23:28:07 +00:00
XCore