llvm-6502/test/CodeGen/ARM64/hello.ll
Tim Northover 7b837d8c75 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00

39 lines
1.1 KiB
LLVM

; RUN: llc < %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
; RUN: llc < %s -mtriple=arm64-linux-gnu | FileCheck %s --check-prefix=CHECK-LINUX
; CHECK-LABEL: main:
; CHECK: stp fp, lr, [sp, #-16]!
; CHECK-NEXT: mov fp, sp
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: stur wzr, [fp, #-4]
; CHECK: adrp x0, L_.str@PAGE
; CHECK: add x0, x0, L_.str@PAGEOFF
; CHECK-NEXT: bl _puts
; CHECK-NEXT: mov sp, fp
; CHECK-NEXT: ldp fp, lr, [sp], #16
; CHECK-NEXT: ret
; CHECK-LINUX-LABEL: main:
; CHECK-LINUX: stp fp, lr, [sp, #-16]!
; CHECK-LINUX-NEXT: mov fp, sp
; CHECK-LINUX-NEXT: sub sp, sp, #16
; CHECK-LINUX-NEXT: stur wzr, [fp, #-4]
; CHECK-LINUX: adrp x0, .L.str
; CHECK-LINUX: add x0, x0, :lo12:.L.str
; CHECK-LINUX-NEXT: bl puts
; CHECK-LINUX-NEXT: mov sp, fp
; CHECK-LINUX-NEXT: ldp fp, lr, [sp], #16
; CHECK-LINUX-NEXT: ret
@.str = private unnamed_addr constant [7 x i8] c"hello\0A\00"
define i32 @main() nounwind ssp {
entry:
%retval = alloca i32, align 4
store i32 0, i32* %retval
%call = call i32 @puts(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0))
ret i32 %call
}
declare i32 @puts(i8*)