llvm-6502/test/CodeGen
2009-12-19 13:52:01 +00:00
..
Alpha
ARM Handle ARM inline asm "w" constraints with 64-bit ("d") registers. 2009-12-18 01:03:29 +00:00
Blackfin
CBackend
CellSPU Revert this dag combine change: 2009-12-17 00:40:05 +00:00
CPP
Generic While this test is testing a problem in the generic part of codegen, 2009-11-27 16:04:14 +00:00
Mips Support PIC loading of constant pool entries 2009-11-25 12:17:58 +00:00
MSP430 Lower setcc branchless, if this is profitable. 2009-12-11 23:01:29 +00:00
PIC16 Emit direction operand in binary insns that stores in memory. 2009-12-19 13:52:01 +00:00
PowerPC Do better with physical reg operands (typically, from inline asm) 2009-12-16 00:29:41 +00:00
SPARC
SystemZ
Thumb Add test case for the phi reuse patch. 2009-12-18 00:11:44 +00:00
Thumb2 Make this test pass on Linux. 2009-12-16 07:35:25 +00:00
X86 Increase opportunities to optimize (brcond (srl (and c1), c2)). 2009-12-18 21:31:31 +00:00
XCore Add XCore support for indirectbr / blockaddress. 2009-11-18 23:20:42 +00:00