llvm-6502/test/MC/Mips/mips3
Matheus Almeida e4439438f6 [mips] Use TwoOperandAliasConstraint for shift instructions.
This enables TableGen to generate an additional two operand
matcher for our shift_rotate_imm and shift_rotate_reg class of instructions.

The tests were also updated so that they include now encoding information
for all affected instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206398 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 16:28:59 +00:00
..
valid-xfail.s [mips] Switch the MIPS-III and MIPS-IV assembler tests to use -mcpu=mips4. 2014-04-10 13:16:49 +00:00
valid.s [mips] Use TwoOperandAliasConstraint for shift instructions. 2014-04-16 16:28:59 +00:00