Akira Hatanaka db8e0bbedb [mips] Increase the number of floating point control registers available to 32. ...

Create a dedicated register class for floating point condition code registers and
move FCC0 from register class CCR to the new register class.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185373 91177308-0d34-0410-b5e6-96231b3b80d8

2013-07-01 20:31:44 +00:00

..

AArch64

AArch64: implement ETMv4 trace system registers.

2013-04-03 12:31:29 +00:00

ARM

ARM: operands should be explicit when disassembled

2013-06-26 13:39:07 +00:00

MBlaze

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Mips

[mips] Increase the number of floating point control registers available to 32.

2013-07-01 20:31:44 +00:00

SystemZ

[SystemZ] Immediate compare-and-branch support

2013-05-29 11:58:52 +00:00

X86

Update the X86 disassembler to use xacquire and xrelease when appropriate.

2013-06-20 22:32:18 +00:00

XCore

[XCore] Add LDAPB instructions.

2013-05-05 13:36:53 +00:00