llvm-6502/test/MC/PowerPC
Ulrich Weigand 25b9bbae69 [PowerPC] PR16512 - Support TLS call sequences in the asm parser
This patch now adds support for recognizing TLS call sequences in
the asm parser.  This needs a new pattern BL8_TLS, which is like
BL8_NOP_TLS except without nop.  That pattern is used for the
asm parser only.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185478 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-02 21:31:59 +00:00
..
lit.local.cfg
ppc64-encoding-bookII.s [PowerPC] Also add "msync" alias 2013-07-01 20:39:50 +00:00
ppc64-encoding-ext.s [PowerPC] Support all condition register logical instructions 2013-07-01 21:40:54 +00:00
ppc64-encoding-fp.s [PowerPC] Add assembler parser 2013-05-03 19:49:39 +00:00
ppc64-encoding-vmx.s [PowerPC] Add assembler parser 2013-05-03 19:49:39 +00:00
ppc64-encoding.s [PowerPC] Support all condition register logical instructions 2013-07-01 21:40:54 +00:00
ppc64-errors.s [PowerPC] Accept 17-bit signed immediates for addis 2013-06-26 13:49:53 +00:00
ppc64-fixup-apply.s [PowerPC] Support @higher et.al. modifiers 2013-06-21 14:43:42 +00:00
ppc64-fixup-explicit.s [PowerPC] Fix @got references to local symbols 2013-07-01 18:19:56 +00:00
ppc64-fixups.s [PowerPC] PR16512 - Support TLS call sequences in the asm parser 2013-07-02 21:31:59 +00:00
ppc64-initial-cfa.s [MC/DWARF] Support .debug_frame / .debug_line code alignment factors 2013-06-12 14:46:54 +00:00
ppc64-operands.s [PowerPC] Accept 17-bit signed immediates for addis 2013-06-26 13:49:53 +00:00
ppc64-regs.s Cleanup PPC Altivec registers in CSR lists and improve VRSAVE handling 2013-07-02 03:39:34 +00:00
ppc64-relocs-01.s [PowerPC] Use assembler source in MC tests 2013-06-12 14:14:18 +00:00
ppc64-tls-relocs-01.s [PowerPC] Use assembler source in MC tests 2013-06-12 14:14:18 +00:00