llvm-6502/test/CodeGen
Filipe Cabecinhas e4a3254c02 Optimize shufflevector that copies an i64/f64 and zeros the rest.
Summary:
Also ran clang-format on the function. The code added is the last else
if block.

Reviewers: nadav, craig.topper, delena

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3518

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208372 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-08 23:16:08 +00:00
..
AArch64 AArch64/ARM64: optimise vector selects & enable test 2014-05-07 14:10:27 +00:00
ARM test/CodeGen: Check that the correct register is used in a store 2014-05-08 22:45:07 +00:00
ARM64 [ARM64-BE] Teach fast-isel about how to set up sub-word stack arguments for big endian calls. 2014-05-08 12:53:50 +00:00
CPP
Generic
Hexagon
Inputs
Mips Add basic functionality for assignment of ints. 2014-05-01 20:39:21 +00:00
MSP430
NVPTX
PowerPC
R600 R600: Expand i64 ISD:SUB 2014-05-05 21:47:15 +00:00
SPARC Remove the -disable-cfi option. 2014-05-05 17:33:26 +00:00
SystemZ
Thumb
Thumb2
X86 Optimize shufflevector that copies an i64/f64 and zeros the rest. 2014-05-08 23:16:08 +00:00
XCore