| .. |
|
InstPrinter
|
Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
|
2013-02-20 16:13:27 +00:00 |
|
MCTargetDesc
|
Remove the MachineMove class.
|
2013-05-13 01:16:13 +00:00 |
|
TargetInfo
|
|
|
|
CMakeLists.txt
|
Hexagon: Pass to replace tranfer/copy instructions into combine instruction
|
2013-05-14 18:54:06 +00:00 |
|
Hexagon.h
|
Hexagon: Pass to replace tranfer/copy instructions into combine instruction
|
2013-05-14 18:54:06 +00:00 |
|
Hexagon.td
|
Hexagon: Fix switch statements in GetDotOldOp and IsNewifyStore.
|
2013-05-10 20:58:11 +00:00 |
|
HexagonAsmPrinter.cpp
|
Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
|
2013-02-20 16:13:27 +00:00 |
|
HexagonAsmPrinter.h
|
|
|
|
HexagonCallingConv.td
|
|
|
|
HexagonCallingConvLower.cpp
|
Don't cache the instruction and register info from the TargetMachine, because
|
2013-06-07 06:19:56 +00:00 |
|
HexagonCallingConvLower.h
|
Don't cache the instruction and register info from the TargetMachine, because
|
2013-06-07 06:19:56 +00:00 |
|
HexagonCFGOptimizer.cpp
|
Print IR from Hexagon MI passes with -print-before/after-all.
|
2013-05-06 21:58:00 +00:00 |
|
HexagonCopyToCombine.cpp
|
Hexagon: Typo fix.
|
2013-05-28 19:01:45 +00:00 |
|
HexagonExpandPredSpillCode.cpp
|
Print IR from Hexagon MI passes with -print-before/after-all.
|
2013-05-06 21:58:00 +00:00 |
|
HexagonFixupHwLoops.cpp
|
Extend Hexagon hardware loop generation to handle various additional cases:
|
2013-02-11 21:37:55 +00:00 |
|
HexagonFrameLowering.cpp
|
Remove dead calls to addFrameMove.
|
2013-05-16 15:08:37 +00:00 |
|
HexagonFrameLowering.h
|
Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
|
2013-02-21 20:05:00 +00:00 |
|
HexagonHardwareLoops.cpp
|
Hexagon: Use multiclass for Jump instructions.
|
2013-05-01 21:37:34 +00:00 |
|
HexagonInstrFormats.td
|
Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.
|
2013-05-10 20:27:34 +00:00 |
|
HexagonInstrFormatsV4.td
|
Hexagon: Change insn class to support instruction encoding.
|
2013-02-14 19:57:17 +00:00 |
|
HexagonInstrInfo.cpp
|
Don't cache the instruction and register info from the TargetMachine, because
|
2013-06-07 06:19:56 +00:00 |
|
HexagonInstrInfo.h
|
Don't cache the instruction and register info from the TargetMachine, because
|
2013-06-07 06:19:56 +00:00 |
|
HexagonInstrInfo.td
|
Hexagon: Pass to replace tranfer/copy instructions into combine instruction
|
2013-05-14 18:54:06 +00:00 |
|
HexagonInstrInfoV3.td
|
Hexagon: Use multiclass for Jump instructions.
|
2013-05-01 21:37:34 +00:00 |
|
HexagonInstrInfoV4.td
|
Hexagon: Add patterns to generate 'combine' instructions.
|
2013-05-14 17:16:38 +00:00 |
|
HexagonInstrInfoV5.td
|
Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.
|
2013-05-10 20:27:34 +00:00 |
|
HexagonIntrinsics.td
|
|
|
|
HexagonIntrinsicsDerived.td
|
|
|
|
HexagonIntrinsicsV3.td
|
|
|
|
HexagonIntrinsicsV4.td
|
|
|
|
HexagonIntrinsicsV5.td
|
|
|
|
HexagonISelDAGToDAG.cpp
|
Don't cache the instruction and register info from the TargetMachine, because
|
2013-06-07 06:19:56 +00:00 |
|
HexagonISelLowering.cpp
|
Order CALLSEQ_START and CALLSEQ_END nodes.
|
2013-05-29 22:03:55 +00:00 |
|
HexagonISelLowering.h
|
Track IR ordering of SelectionDAG nodes 2/4.
|
2013-05-25 02:42:55 +00:00 |
|
HexagonMachineFunctionInfo.h
|
Hexagon: Use multiclass for Jump instructions.
|
2013-05-01 21:37:34 +00:00 |
|
HexagonMachineScheduler.cpp
|
Don't cache the instruction and register info from the TargetMachine, because
|
2013-06-07 06:19:56 +00:00 |
|
HexagonMachineScheduler.h
|
Don't cache the instruction and register info from the TargetMachine, because
|
2013-06-07 06:19:56 +00:00 |
|
HexagonMCInstLower.cpp
|
Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
|
2013-02-20 16:13:27 +00:00 |
|
HexagonNewValueJump.cpp
|
Suppress GCC compiler warnings in release builds about variables that are only
|
2013-05-13 07:50:47 +00:00 |
|
HexagonOperands.td
|
|
|
|
HexagonPeephole.cpp
|
Print IR from Hexagon MI passes with -print-before/after-all.
|
2013-05-06 21:58:00 +00:00 |
|
HexagonRegisterInfo.cpp
|
Don't cache the instruction and register info from the TargetMachine, because
|
2013-06-07 06:19:56 +00:00 |
|
HexagonRegisterInfo.h
|
Don't cache the instruction and register info from the TargetMachine, because
|
2013-06-07 06:19:56 +00:00 |
|
HexagonRegisterInfo.td
|
Make SubRegIndex size mandatory, following r183020.
|
2013-05-31 23:45:26 +00:00 |
|
HexagonRemoveSZExtArgs.cpp
|
Print IR from Hexagon MI passes with -print-before/after-all.
|
2013-05-06 21:58:00 +00:00 |
|
HexagonSchedule.td
|
Hexagon: Change insn class to support instruction encoding.
|
2013-02-14 19:57:17 +00:00 |
|
HexagonScheduleV4.td
|
Hexagon: Change insn class to support instruction encoding.
|
2013-02-14 19:57:17 +00:00 |
|
HexagonSelectCCInfo.td
|
|
|
|
HexagonSelectionDAGInfo.cpp
|
Track IR ordering of SelectionDAG nodes 2/4.
|
2013-05-25 02:42:55 +00:00 |
|
HexagonSelectionDAGInfo.h
|
Track IR ordering of SelectionDAG nodes 2/4.
|
2013-05-25 02:42:55 +00:00 |
|
HexagonSplitConst32AndConst64.cpp
|
Hexagon: Fix Small Data support to handle -G 0 correctly.
|
2013-05-07 19:53:00 +00:00 |
|
HexagonSplitTFRCondSets.cpp
|
Print IR from Hexagon MI passes with -print-before/after-all.
|
2013-05-06 21:58:00 +00:00 |
|
HexagonSubtarget.cpp
|
Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
|
2013-03-22 18:41:34 +00:00 |
|
HexagonSubtarget.h
|
|
|
|
HexagonTargetMachine.cpp
|
Don't cast away constness.
|
2013-05-17 11:39:41 +00:00 |
|
HexagonTargetMachine.h
|
|
|
|
HexagonTargetObjectFile.cpp
|
Hexagon: Fix Small Data support to handle -G 0 correctly.
|
2013-05-07 19:53:00 +00:00 |
|
HexagonTargetObjectFile.h
|
Hexagon: Fix Small Data support to handle -G 0 correctly.
|
2013-05-07 19:53:00 +00:00 |
|
HexagonVarargsCallingConvention.h
|
|
|
|
HexagonVLIWPacketizer.cpp
|
Hexagon: Make helper functions static.
|
2013-05-23 15:43:11 +00:00 |
|
LLVMBuild.txt
|
|
|
|
Makefile
|
|
|
54a56fad36