Chad Rosier e5e674ba11 [fast-isel] Fallback to SelectionDAG isel if we require strict alignment for ...

non-aligned i32 loads/stores.
rdar://12304911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164381 91177308-0d34-0410-b5e6-96231b3b80d8

2012-09-21 16:58:35 +00:00

..

ARM

[fast-isel] Fallback to SelectionDAG isel if we require strict alignment for

2012-09-21 16:58:35 +00:00

CellSPU

Add test triples to fix win32 failures. Revert workaround from r161292.

2012-08-08 20:31:37 +00:00

CPP

test commit

2012-07-18 17:53:05 +00:00

Generic

BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle

2012-08-24 18:14:27 +00:00

Hexagon

LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the

2012-09-05 16:01:40 +00:00

MBlaze

…

Mips

Handled unaligned load/stores properly in Mips16

2012-09-15 01:02:03 +00:00

MSP430

Reapply r161633-161634 "Partition use lists so defs always come before uses.""

2012-08-10 00:21:30 +00:00

NVPTX

Add llvm.fabs intrinsic.

2012-05-28 21:48:37 +00:00

PowerPC

Specify cpu to get the correct instruction ordering. Remove XFAIL.

2012-09-20 14:59:42 +00:00

SPARC

Move load_to_switch.ll to test/CodeGen/SPARC/

2012-09-19 09:25:03 +00:00

Thumb

Fix Thumb2 fixup kind in the integrated-as.

2012-09-01 15:06:36 +00:00

Thumb2

Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte

2012-09-18 01:42:45 +00:00

X86

llvm/test/CodeGen/X86/pr5145.ll: Tweak expressions to match for darwin target.

2012-09-21 05:19:19 +00:00

XCore

Fix pattern for MKMSK instruction.

2012-06-13 17:59:12 +00:00