..
ARMAddressingModes.h
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
2012-02-18 12:03:15 +00:00
ARMAsmBackend.cpp
ARM 'adr' fixups don't need the interworking addend tweaking.
2012-04-12 01:19:35 +00:00
ARMBaseInfo.h
ARM more NEON VLD/VST composite physical register refactoring.
2012-03-06 23:10:38 +00:00
ARMELFObjectWriter.cpp
Ensure conditional BL instructions for ARM are given the fixup fixup_arm_condbranch.
2012-03-30 09:15:32 +00:00
ARMFixupKinds.h
Ensure conditional BL instructions for ARM are given the fixup fixup_arm_condbranch.
2012-03-30 09:15:32 +00:00
ARMMachObjectWriter.cpp
Ensure conditional BL instructions for ARM are given the fixup fixup_arm_condbranch.
2012-03-30 09:15:32 +00:00
ARMMCAsmInfo.cpp
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
2012-02-18 12:03:15 +00:00
ARMMCAsmInfo.h
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
2012-02-18 12:03:15 +00:00
ARMMCCodeEmitter.cpp
Unify internal representation of ARM instructions with a register right-shifted by #32 . These are stored as shifts by #0 in the MCInst and correctly marshalled when transforming from or to assembly representation.
2012-04-25 18:00:18 +00:00
ARMMCExpr.cpp
ARMMCExpr.h
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
2012-02-18 12:03:15 +00:00
ARMMCTargetDesc.cpp
If triple is armv7 / thumbv7 and a CPU is specified, do not automatically assume
2012-04-26 01:13:36 +00:00
ARMMCTargetDesc.h
If triple is armv7 / thumbv7 and a CPU is specified, do not automatically assume
2012-04-26 01:13:36 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile