llvm-6502/test/CodeGen
2012-09-26 09:48:32 +00:00
..
ARM Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM. 2012-09-26 09:48:32 +00:00
CellSPU
CPP
Generic
Hexagon LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the 2012-09-05 16:01:40 +00:00
MBlaze
Mips Handled unaligned load/stores properly in Mips16 2012-09-15 01:02:03 +00:00
MSP430
NVPTX
PowerPC Specify MachinePointerInfo as refering to the argument value and offset of the 2012-09-24 20:47:19 +00:00
SPARC Move load_to_switch.ll to test/CodeGen/SPARC/ 2012-09-19 09:25:03 +00:00
Thumb Fix Thumb2 fixup kind in the integrated-as. 2012-09-01 15:06:36 +00:00
Thumb2 Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte 2012-09-18 01:42:45 +00:00
X86 llvm/test/CodeGen/X86/mulx*.ll: Fix copypasto. 2012-09-26 09:24:12 +00:00
XCore