llvm-6502/lib/Target/Sparc
Daniel Sanders 4ddb0ced90 Replace string GNU Triples with llvm::Triple in TargetMachine. NFC.
Summary:
For the moment, TargetMachine::getTargetTriple() still returns a StringRef.

This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: ted, llvm-commits, rengolin, jholewinski

Differential Revision: http://reviews.llvm.org/D10362

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239554 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 19:41:26 +00:00
..
AsmParser Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MCSubtargetInfo(). NFC. 2015-06-10 12:11:26 +00:00
Disassembler Sparc: Add the "alternate address space" load/store instructions. 2015-05-18 16:35:04 +00:00
InstPrinter MC: Add target hook to control symbol quoting 2015-06-09 00:31:39 +00:00
MCTargetDesc Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MCSubtargetInfo(). NFC. 2015-06-10 12:11:26 +00:00
TargetInfo [Sparc] Really add sparcel architecture support. 2015-04-29 20:30:57 +00:00
CMakeLists.txt Reinstate "Nuke the old JIT." 2014-09-02 22:28:02 +00:00
DelaySlotFiller.cpp Reuse a bunch of cached subtargets and remove getSubtarget calls 2015-01-30 23:46:43 +00:00
LLVMBuild.txt
Makefile Reinstate "Nuke the old JIT." 2014-09-02 22:28:02 +00:00
README.txt JIT support has been added awhile ago. 2014-08-30 14:52:34 +00:00
Sparc.h Reinstate "Nuke the old JIT." 2014-09-02 22:28:02 +00:00
Sparc.td [SparcInstPrinter] Use the subtarget that is passed to the print function 2015-03-28 04:03:51 +00:00
SparcAsmPrinter.cpp MC: Add target hook to control symbol quoting 2015-06-09 00:31:39 +00:00
SparcCallingConv.td
SparcFrameLowering.cpp [ShrinkWrap] Add (a simplified version) of shrink-wrapping. 2015-05-05 17:38:16 +00:00
SparcFrameLowering.h [ShrinkWrap] Add (a simplified version) of shrink-wrapping. 2015-05-05 17:38:16 +00:00
SparcInstr64Bit.td Sparc: Add the "alternate address space" load/store instructions. 2015-05-18 16:35:04 +00:00
SparcInstrAliases.td Sparc: support the "set" synthetic instruction. 2015-05-18 16:43:33 +00:00
SparcInstrFormats.td Sparc: support the "set" synthetic instruction. 2015-05-18 16:43:33 +00:00
SparcInstrInfo.cpp [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC. 2015-06-11 19:30:37 +00:00
SparcInstrInfo.h [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC. 2015-06-11 19:30:37 +00:00
SparcInstrInfo.td Sparc: Support PSR, TBR, WIM read/write instructions. 2015-05-18 16:38:47 +00:00
SparcInstrVIS.td Fix a whole bunch of binary literals which were the wrong size. All were being silently zero extended to the correct width. 2014-08-07 05:46:54 +00:00
SparcISelDAGToDAG.cpp Add support for the Sparc implementation-defined "ASR" registers. 2015-05-18 16:29:48 +00:00
SparcISelLowering.cpp Change getTargetNodeName() to produce compiler warnings for missing cases, fix them 2015-05-07 21:33:59 +00:00
SparcISelLowering.h Change getTargetNodeName() to produce compiler warnings for missing cases, fix them 2015-05-07 21:33:59 +00:00
SparcMachineFunctionInfo.cpp
SparcMachineFunctionInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
SparcMCInstLower.cpp MC: Clean up MCExpr naming. NFC. 2015-05-30 01:25:56 +00:00
SparcRegisterInfo.cpp Remove the need to cache the subtarget in the Sparc TargetRegisterInfo 2015-03-12 05:55:26 +00:00
SparcRegisterInfo.h Remove some unnecessary forward declarations and put a couple more 2015-03-12 06:07:16 +00:00
SparcRegisterInfo.td Sparc: Support PSR, TBR, WIM read/write instructions. 2015-05-18 16:38:47 +00:00
SparcSelectionDAGInfo.cpp Have SparcSelectionDAGInfo take a DataLayout to initialize since 2014-06-26 22:33:52 +00:00
SparcSelectionDAGInfo.h Use 'override/final' instead of 'virtual' for overridden methods 2015-04-11 02:11:45 +00:00
SparcSubtarget.cpp Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MCSubtargetInfo(). NFC. 2015-06-10 12:11:26 +00:00
SparcSubtarget.h Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MCSubtargetInfo(). NFC. 2015-06-10 12:11:26 +00:00
SparcTargetMachine.cpp Replace string GNU Triples with llvm::Triple in TargetMachine. NFC. 2015-06-11 19:41:26 +00:00
SparcTargetMachine.h Replace string GNU Triples with llvm::Triple in TargetMachine. NFC. 2015-06-11 19:41:26 +00:00
SparcTargetObjectFile.cpp MC: Clean up MCExpr naming. NFC. 2015-05-30 01:25:56 +00:00
SparcTargetObjectFile.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
SparcTargetStreamer.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00

To-do
-----

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.
* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.
* When in V9 mode, register allocate %icc[0-3].
* Add support for isel'ing UMUL_LOHI instead of marking it as Expand.
* Emit the 'Branch on Integer Register with Prediction' instructions.  It's
  not clear how to write a pattern for this though:

float %t1(int %a, int* %p) {
        %C = seteq int %a, 0
        br bool %C, label %T, label %F
T:
        store int 123, int* %p
        br label %F
F:
        ret float undef
}

codegens to this:

t1:
        save -96, %o6, %o6
1)      subcc %i0, 0, %l0
1)      bne .LBBt1_2    ! F
        nop
.LBBt1_1:       ! T
        or %g0, 123, %l0
        st %l0, [%i1]
.LBBt1_2:       ! F
        restore %g0, %g0, %g0
        retl
        nop

1) should be replaced with a brz in V9 mode.

* Same as above, but emit conditional move on register zero (p192) in V9
  mode.  Testcase:

int %t1(int %a, int %b) {
        %C = seteq int %a, 0
        %D = select bool %C, int %a, int %b
        ret int %D
}

* Emit MULX/[SU]DIVX instructions in V9 mode instead of fiddling
  with the Y register, if they are faster.

* Codegen bswap(load)/store(bswap) -> load/store ASI

* Implement frame pointer elimination, e.g. eliminate save/restore for
  leaf fns.
* Fill delay slots

* Use %g0 directly to materialize 0. No instruction is required.