Chris Lattner e7af178ccf Fix code that assumes the register info will be dumped into a target ... namespace instead of the reg class namespace. Update getRegClassForType() to use modified names due to tblgen change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22923 91177308-0d34-0410-b5e6-96231b3b80d8		2005-08-19 18:50:11 +00:00
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Alpha	This code has always been dead for alpha	2005-08-19 18:33:26 +00:00
CBackend	Culling out use of unions for converting FP to bits and vice versa.	2005-08-17 19:34:49 +00:00
IA64	This code has always been dead on itanium	2005-08-19 18:34:37 +00:00
PowerPC	Now that the simple isels are dead, so is this.	2005-08-19 18:30:39 +00:00
Skeleton	The skeleton target has never had an isel	2005-08-19 18:35:41 +00:00
Sparc	Fix code that assumes the register info will be dumped into a target	2005-08-19 18:50:11 +00:00
SparcV8	Fix code that assumes the register info will be dumped into a target	2005-08-19 18:50:11 +00:00
SparcV9	Sparcv9 gets no operand info	2005-08-19 16:56:56 +00:00
X86	The simple isel being gone makes this dead!	2005-08-19 18:32:03 +00:00
Makefile	Implement the --enable-targets= feature of the configure script. The make	2005-04-22 17:20:11 +00:00
MRegisterInfo.cpp	Convert tabs to spaces	2005-04-22 17:54:37 +00:00
Target.td	Require that targets specify a namespace for their register classes.	2005-08-19 18:48:48 +00:00
TargetData.cpp	Update to use the new MathExtras.h support for log2 computation.	2005-08-02 19:26:06 +00:00
TargetFrameInfo.cpp	Eliminate all remaining tabs and trailing spaces.	2005-07-27 06:12:32 +00:00
TargetInstrInfo.cpp	Convert tabs to spaces	2005-04-22 17:54:37 +00:00
TargetMachine.cpp	Remove the X86 and PowerPC Simple instruction selectors; their time has	2005-08-18 23:53:15 +00:00
TargetMachineRegistry.cpp	Remove trailing whitespace	2005-04-21 22:55:34 +00:00
TargetSchedInfo.cpp	Convert tabs to spaces	2005-04-22 17:54:37 +00:00
TargetSubtarget.cpp	Eliminate all remaining tabs and trailing spaces.	2005-07-27 06:12:32 +00:00