Toma Tabacu e7d84301cc [mips] [IAS] Add support for the .insn directive. ...

Summary:
This assembler directive marks the current label as an instruction label in microMIPS and MIPS16.

This initial implementation works only for microMIPS.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8006

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235084 91177308-0d34-0410-b5e6-96231b3b80d8

2015-04-16 09:53:47 +00:00

..

AArch64

Update tests to not be as dependent on section numbers.

2015-04-15 15:59:37 +00:00

ARM

Fix BXJ is undefined in AArch32.

2015-04-15 17:28:23 +00:00

AsmParser

Add support for .ifnes psuedo-op.

2015-03-18 14:20:54 +00:00

COFF

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Disassembler

[AArch64] Allow non-standard INS/DUP encodings

2015-04-14 15:07:26 +00:00

ELF

Update tests to not be as dependent on section numbers.

2015-04-15 15:59:37 +00:00

Hexagon

Expand MUX instructions early on Hexagon

2015-03-31 13:35:12 +00:00

MachO

MC: For variable symbols, maintain MCSymbol::Section as a cache.

2015-04-03 01:46:11 +00:00

Markup

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Mips

[mips] [IAS] Add support for the .insn directive.

2015-04-16 09:53:47 +00:00

PowerPC

Update tests to not be as dependent on section numbers.

2015-04-15 15:59:37 +00:00

R600

R600/SI: Initial support for assembler and inline assembly

2015-04-08 01:09:26 +00:00

Sparc

…

SystemZ

[SystemZ] Support transactional execution on zEC12

2015-04-01 12:51:43 +00:00

X86

Update tests to not be as dependent on section numbers.

2015-04-15 15:59:37 +00:00