Evan Cheng e90da97f3e LHS = X86ISD::CMOVcc LHS, RHS means LHS = RHS if cc. So the operands must be ... flipped around. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25290 91177308-0d34-0410-b5e6-96231b3b80d8		2006-01-13 19:51:46 +00:00
..
Alpha	make DAG isel the default	2006-01-13 18:49:47 +00:00
CBackend	yet more C++ standards-compliance stuff.	2005-12-27 10:40:34 +00:00
IA64	don't be a doofus - this fixes storing bools	2006-01-13 10:28:25 +00:00
PowerPC	implement stacksave/stackrestore on PPC	2006-01-13 17:52:03 +00:00
Skeleton
Sparc	expand unsupported stacksave/stackrestore nodes	2006-01-13 02:42:53 +00:00
SparcV8	expand unsupported stacksave/stackrestore nodes	2006-01-13 02:42:53 +00:00
SparcV9
X86	LHS = X86ISD::CMOVcc LHS, RHS means LHS = RHS if cc. So the operands must be	2006-01-13 19:51:46 +00:00
Makefile
MRegisterInfo.cpp
SubtargetFeature.cpp
Target.td	New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace	2006-01-09 18:28:21 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp
TargetSchedInfo.cpp
TargetSchedule.td
TargetSelectionDAG.td	Add bswap, rotl, and rotr nodes	2006-01-11 21:21:00 +00:00
TargetSubtarget.cpp