llvm-6502/test/CodeGen/Mips/global-address.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

47 lines
2.0 KiB
LLVM

; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-O32
; RUN: llc -march=mipsel -relocation-model=static -mtriple=mipsel-linux-gnu < %s | FileCheck %s -check-prefix=STATIC-O32
; RUN: llc -march=mips64el -mcpu=mips64r2 -target-abi n32 -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-N32
; RUN: llc -march=mips64el -mcpu=mips64r2 -target-abi n32 -relocation-model=static -mtriple=mipsel-linux-gnu < %s | FileCheck %s -check-prefix=STATIC-N32
; RUN: llc -march=mips64el -mcpu=mips64r2 -target-abi n64 -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-N64
; RUN: llc -march=mips64el -mcpu=mips64r2 -target-abi n64 -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-N64
@s1 = internal unnamed_addr global i32 8, align 4
@g1 = external global i32
define void @foo() nounwind {
entry:
; PIC-O32: lw $[[R0:[0-9]+]], %got(s1)
; PIC-O32: lw ${{[0-9]+}}, %lo(s1)($[[R0]])
; PIC-O32: lw ${{[0-9]+}}, %got(g1)
; STATIC-O32: lui $[[R1:[0-9]+]], %hi(s1)
; STATIC-O32: lw ${{[0-9]+}}, %lo(s1)($[[R1]])
; STATIC-O32: lui $[[R2:[0-9]+]], %hi(g1)
; STATIC-O32: lw ${{[0-9]+}}, %lo(g1)($[[R2]])
; PIC-N32: lw $[[R0:[0-9]+]], %got_page(s1)
; PIC-N32: lw ${{[0-9]+}}, %got_ofst(s1)($[[R0]])
; PIC-N32: lw ${{[0-9]+}}, %got_disp(g1)
; STATIC-N32: lui $[[R1:[0-9]+]], %hi(s1)
; STATIC-N32: lw ${{[0-9]+}}, %lo(s1)($[[R1]])
; STATIC-N32: lui $[[R2:[0-9]+]], %hi(g1)
; STATIC-N32: lw ${{[0-9]+}}, %lo(g1)($[[R2]])
; PIC-N64: ld $[[R0:[0-9]+]], %got_page(s1)
; PIC-N64: lw ${{[0-9]+}}, %got_ofst(s1)($[[R0]])
; PIC-N64: ld ${{[0-9]+}}, %got_disp(g1)
; STATIC-N64: ld $[[R1:[0-9]+]], %got_page(s1)
; STATIC-N64: lw ${{[0-9]+}}, %got_ofst(s1)($[[R1]])
; STATIC-N64: ld ${{[0-9]+}}, %got_disp(g1)
%0 = load i32, i32* @s1, align 4
tail call void @foo1(i32 %0) nounwind
%1 = load i32, i32* @g1, align 4
store i32 %1, i32* @s1, align 4
%add = add nsw i32 %1, 2
store i32 %add, i32* @g1, align 4
ret void
}
declare void @foo1(i32)