mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
80 lines
2.8 KiB
LLVM
80 lines
2.8 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; This test just checks that the compiler doesn't crash.
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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; FUNC-LABEL: {{^}}v32i8_to_v8i32:
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; SI: s_endpgm
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define void @v32i8_to_v8i32(<32 x i8> addrspace(2)* inreg) #0 {
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entry:
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%1 = load <32 x i8>, <32 x i8> addrspace(2)* %0
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%2 = bitcast <32 x i8> %1 to <8 x i32>
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%3 = extractelement <8 x i32> %2, i32 1
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%4 = icmp ne i32 %3, 0
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%5 = select i1 %4, float 0.0, float 1.0
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %5, float %5, float %5, float %5)
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ret void
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}
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; FUNC-LABEL: {{^}}i8ptr_v16i8ptr:
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; SI: s_endpgm
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define void @i8ptr_v16i8ptr(<16 x i8> addrspace(1)* %out, i8 addrspace(1)* %in) {
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entry:
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%0 = bitcast i8 addrspace(1)* %in to <16 x i8> addrspace(1)*
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%1 = load <16 x i8>, <16 x i8> addrspace(1)* %0
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store <16 x i8> %1, <16 x i8> addrspace(1)* %out
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ret void
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}
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define void @f32_to_v2i16(<2 x i16> addrspace(1)* %out, float addrspace(1)* %in) nounwind {
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%load = load float, float addrspace(1)* %in, align 4
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%bc = bitcast float %load to <2 x i16>
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store <2 x i16> %bc, <2 x i16> addrspace(1)* %out, align 4
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ret void
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}
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define void @v2i16_to_f32(float addrspace(1)* %out, <2 x i16> addrspace(1)* %in) nounwind {
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%load = load <2 x i16>, <2 x i16> addrspace(1)* %in, align 4
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%bc = bitcast <2 x i16> %load to float
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store float %bc, float addrspace(1)* %out, align 4
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ret void
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}
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define void @v4i8_to_i32(i32 addrspace(1)* %out, <4 x i8> addrspace(1)* %in) nounwind {
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%load = load <4 x i8>, <4 x i8> addrspace(1)* %in, align 4
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%bc = bitcast <4 x i8> %load to i32
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store i32 %bc, i32 addrspace(1)* %out, align 4
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ret void
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}
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define void @i32_to_v4i8(<4 x i8> addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
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%load = load i32, i32 addrspace(1)* %in, align 4
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%bc = bitcast i32 %load to <4 x i8>
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store <4 x i8> %bc, <4 x i8> addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}bitcast_v2i32_to_f64:
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; SI: s_endpgm
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define void @bitcast_v2i32_to_f64(double addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
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%val = load <2 x i32>, <2 x i32> addrspace(1)* %in, align 8
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%add = add <2 x i32> %val, <i32 4, i32 9>
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%bc = bitcast <2 x i32> %add to double
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store double %bc, double addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}bitcast_f64_to_v2i32:
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; SI: s_endpgm
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define void @bitcast_f64_to_v2i32(<2 x i32> addrspace(1)* %out, double addrspace(1)* %in) {
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%val = load double, double addrspace(1)* %in, align 8
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%add = fadd double %val, 4.0
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%bc = bitcast double %add to <2 x i32>
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store <2 x i32> %bc, <2 x i32> addrspace(1)* %out, align 8
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ret void
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}
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attributes #0 = { "ShaderType"="0" }
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