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acb6d9834a
Unlike other v6+ processors, cortex-m0 never supports unaligned accesses. From the v6m ARM ARM: "A3.2 Alignment support: ARMv6-M always generates a fault when an unaligned access occurs." rdar://16491560 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205452 91177308-0d34-0410-b5e6-96231b3b80d8
14 lines
369 B
LLVM
14 lines
369 B
LLVM
; RUN: llc -mtriple=thumbv6m-apple-unknown-macho < %s | FileCheck --check-prefix=V6M %s
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; RUN: llc -mtriple=thumbv7m-apple-unknown-macho < %s | FileCheck --check-prefix=V7M %s
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define i32 @split_load(i32* %p) nounwind {
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; V6M-LABEL: split_load
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; V6M: ldrh
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; V6M: ldrh
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; V7M-LABEL: split_load
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; V7M-NOT: ldrh
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; V7M: bx lr
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%val = load i32* %p, align 2
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ret i32 %val
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}
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