llvm-6502/include/llvm/CodeGen
Duncan Sands 36397f5034 Support for trampolines, except for X86 codegen which is
still under discussion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40549 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-27 12:58:54 +00:00
..
AsmPrinter.h EmitAlignment() also emits optional fill value. 2007-07-25 23:35:07 +00:00
CallingConvLower.h Generalize MVT::ValueType and associated functions to be able to represent 2007-06-25 16:23:39 +00:00
DwarfWriter.h
ELFRelocation.h
FileWriters.h
IntrinsicLowering.h Add explicit keywords. 2007-07-05 20:40:15 +00:00
LinkAllCodegenComponents.h check in the BigBlock local register allocator 2007-06-22 08:27:12 +00:00
LiveInterval.h
LiveIntervalAnalysis.h Factor live variable analysis so it does not do register coalescing 2007-06-08 17:18:56 +00:00
LiveVariables.h Don't assume that only Uses can be kills. Defs are marked as kills initially 2007-07-20 23:17:34 +00:00
MachineBasicBlock.h Fix misue of iterator pointing to erased object. Uncovered by 2007-06-29 02:45:24 +00:00
MachineCodeEmitter.h
MachineConstantPool.h
MachineFrameInfo.h
MachineFunction.h
MachineFunctionPass.h Make MachineFunctionPass::runOnFunction non-virtual. Subclasses override 2007-07-05 20:39:35 +00:00
MachineInstr.h Remove subreg index from MachineInstr's and also keep vregs as unsigned when adding operands. 2007-07-26 07:00:46 +00:00
MachineInstrBuilder.h Fix 80 col violation. 2007-07-26 07:03:08 +00:00
MachineJumpTableInfo.h
MachineLocation.h
MachineModuleInfo.h Long live the exception handling! 2007-07-14 14:06:15 +00:00
MachinePassRegistry.h
MachineRelocation.h
MachORelocation.h
Passes.h Add a MachineFunction pass, which runs post register allocation, that turns subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions. 2007-07-26 08:18:32 +00:00
RegAllocRegistry.h
RegisterScavenging.h Add explicit keywords. 2007-07-05 20:40:15 +00:00
RuntimeLibcalls.h
SchedGraphCommon.h
ScheduleDAG.h Teach DAG scheduling how to properly emit subreg insert/extract machine instructions. PR1350 2007-07-26 08:12:07 +00:00
SchedulerRegistry.h
SelectionDAG.h Generalize MVT::ValueType and associated functions to be able to represent 2007-06-25 16:23:39 +00:00
SelectionDAGISel.h Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask. 2007-07-24 23:00:27 +00:00
SelectionDAGNodes.h Support for trampolines, except for X86 codegen which is 2007-07-27 12:58:54 +00:00
SimpleRegisterCoalescing.h missed this one 2007-07-09 12:20:30 +00:00
SSARegMap.h
ValueTypes.h Add support for 3 element 32-bit vector ValueTypes. 2007-07-26 01:46:52 +00:00
ValueTypes.td Fix comments for new types. 2007-07-26 01:48:57 +00:00