llvm-6502/test/CodeGen
Andrea Di Biagio eafdf26d89 [X86] Improved tablegen patters for matching TZCNT/LZCNT.
Teach ISel how to match a TZCNT/LZCNT from a conditional move if the
condition code is X86_COND_NE.
Existing tablegen patterns only allowed to match TZCNT/LZCNT from a
X86cond with condition code equal to X86_COND_E. To avoid introducing
extra rules, I added an 'ImmLeaf' definition that checks if the
condition code is COND_E or COND_NE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223668 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 17:47:18 +00:00
..
AArch64 [AArch64] Combining Load and IntToFp should check for neon availability 2014-12-04 20:25:50 +00:00
ARM Add missing FP build attribute tests. 2014-12-05 08:22:47 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] Fix passing of small structures for big-endian O32. 2014-12-02 20:40:27 +00:00
MSP430
NVPTX [NVPTX] Do not emit .weak symbols for NVPTX 2014-12-01 21:16:17 +00:00
PowerPC [PowerPC]Update Power VSX test cases to also test fast-isel 2014-12-05 20:32:05 +00:00
R600 R600/SI: Restore PrivateGlobalPrefix to the default ELF value of ".L" 2014-12-06 05:34:34 +00:00
SPARC
SystemZ
Thumb Re-add support to llvm-objdump for Mach-O universal files and archives with -macho 2014-12-04 23:56:27 +00:00
Thumb2
X86 [X86] Improved tablegen patters for matching TZCNT/LZCNT. 2014-12-08 17:47:18 +00:00
XCore