mirror of
https://github.com/c64scene-ar/llvm-6502.git
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8eaed0f63d
This matches the format produced by the AMD proprietary driver.
//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
you want to convert to this script as arguments).
//==================================================================//
; This was necessary on my system so that A-Z in sed would match only
; upper case. I'm not sure why.
export LC_ALL='C'
TEST_FILES="$*"
MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`
for f in $TEST_FILES; do
# Check that there are SI tests:
grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
if [ $? -eq 0 ]; then
for match in $MATCHES; do
sed -i -e "s/\([ :]$match\)/\L\1/" $f
done
# Try to get check lines with partial instruction names
sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
fi
done
sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll
//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//
export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
39 lines
1.4 KiB
LLVM
39 lines
1.4 KiB
LLVM
; XFAIL: *
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; RUN: llc -verify-machineinstrs -march=r600 -mcpu=SI -mattr=-promote-alloca < %s | FileCheck -check-prefix=SI %s
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; 64-bit select was originally lowered with a build_pair, and this
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; could be simplified to 1 cndmask instead of 2, but that broken when
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; it started being implemented with a v2i32 build_vector and
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; bitcasting.
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define void @trunc_select_i64(i32 addrspace(1)* %out, i64 %a, i64 %b, i32 %c) {
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%cmp = icmp eq i32 %c, 0
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%select = select i1 %cmp, i64 %a, i64 %b
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%trunc = trunc i64 %select to i32
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store i32 %trunc, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FIXME: Fix truncating store for local memory
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; SI-LABEL: {{^}}trunc_load_alloca_i64:
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; SI: v_movrels_b32
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; SI-NOT: v_movrels_b32
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; SI: s_endpgm
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define void @trunc_load_alloca_i64(i64 addrspace(1)* %out, i32 %a, i32 %b) {
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%idx = add i32 %a, %b
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%alloca = alloca i64, i32 4
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%gep0 = getelementptr i64* %alloca, i64 0
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%gep1 = getelementptr i64* %alloca, i64 1
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%gep2 = getelementptr i64* %alloca, i64 2
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%gep3 = getelementptr i64* %alloca, i64 3
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store i64 24, i64* %gep0, align 8
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store i64 9334, i64* %gep1, align 8
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store i64 3935, i64* %gep2, align 8
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store i64 9342, i64* %gep3, align 8
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%gep = getelementptr i64* %alloca, i32 %idx
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%load = load i64* %gep, align 8
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%mask = and i64 %load, 4294967296
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%add = add i64 %mask, -1
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store i64 %add, i64 addrspace(1)* %out, align 4
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ret void
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}
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