Chad Rosier eb1bac0afa [AArch64] Refactor NEON floating-point Max/Min/Maxnm/Minnm across vector AArch64 ... intrinsics to use f32 types, rather than their vector equivalents. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197090 91177308-0d34-0410-b5e6-96231b3b80d8		2013-12-11 23:21:25 +00:00
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AArch64	[AArch64] Refactor NEON floating-point Max/Min/Maxnm/Minnm across vector AArch64	2013-12-11 23:21:25 +00:00
ARM	ARM: constrain register-class in fast-isel	2013-12-11 16:04:57 +00:00
CPP
Generic
Hexagon
Inputs
Mips	Distinguish and choose 16 or 32 bit forms of save/restore for Mips16.	2013-12-11 03:32:44 +00:00
MSP430
NVPTX	[NVPTX] Fix off-by-one error when creating the VT list for an SDNode	2013-12-05 12:58:00 +00:00
PowerPC	Fix the PPC subsumes-predicate check	2013-12-11 23:12:25 +00:00
R600	R600/SI: Add i64 cmp tests	2013-12-10 21:11:55 +00:00
SPARC	[SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9.	2013-12-09 05:13:25 +00:00
SystemZ	[SystemZ] Optimize fcmp X, 0 in cases where X is also negated	2013-12-11 11:45:08 +00:00
Thumb
Thumb2
X86	On ELF and COFF treat linker_private like private.	2013-12-11 22:18:44 +00:00
XCore