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llvm-6502/lib/Target/Mips
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Daniel Sanders 663e484df9 [mips][fp64a] Temporarily disable odd-numbered double-precision registers when using the FP64A ABI. 
Summary:
A few instructions (mostly cvt.d.w and similar) are causing problems with
-mfp64 and -mno-odd-spreg and it looks like fixing it properly may
take several weeks. In the meantime, let's disable the odd-numbered
double-precision registers so that the generated code is at least valid.

The problem is that instructions like cvt.d.w read from the 32-bit low
subregister of a double-precision FPU register. This often leads to the compiler
to inserting moves to transfer a GPR32 to a FGR32 using mtc1. Such moves
violate the rules against 32-bit writes to odd-numbered FPU registers imposed
by -mno-odd-spreg. By disabling the odd-numbered double-precision registers, it
becomes impossible for the 32-bit low subregister to be odd-numbered.

This fixes numerous test-suite failures when compiling for the FP64A ABI
('-mfp64 -mno-odd-spreg'). There is no LLVM test case because it's difficult to
test that odd-numbered FPU registers are not allocatable. Instead, we depend on
the assembler (GAS and -fintegrated-as) raising errors when the rules are
violated.

Differential Revision: http://reviews.llvm.org/D4532


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213160 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-16 15:34:07 +00:00
..
AsmParser [mips] Correct .MIPS.abiflags fp_abi field for -mfpxx and without .module 2014-07-15 15:31:39 +00:00
Disassembler [mips] Use MFHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64 moves 2014-07-14 12:41:31 +00:00
InstPrinter [mips][mips64r6] Add Relocations R_MIPS_PCHI16, R_MIPS_PCLO16 2014-05-27 14:58:51 +00:00
MCTargetDesc Re-commit: [mips] Correct section alignments and EntrySizes for .bss, .text, .data, .reginfo, .MIPS.options, and .MIPS.abiflags 2014-07-14 15:05:51 +00:00
TargetInfo
CMakeLists.txt
LLVMBuild.txt
Makefile
MicroMipsInstrFormats.td
MicroMipsInstrFPU.td [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6 2014-06-12 15:00:17 +00:00
MicroMipsInstrInfo.td [mips][mips64r6] Use JALR for returns instead of JR (which is not available on MIPS32r6/MIPS64r6) 2014-07-09 10:16:07 +00:00
Mips16FrameLowering.cpp So that we can include frame lowering in the subtarget, remove include 2014-07-02 23:29:55 +00:00
Mips16FrameLowering.h So that we can include frame lowering in the subtarget, remove include 2014-07-02 23:29:55 +00:00
Mips16HardFloat.cpp
Mips16HardFloat.h
Mips16HardFloatInfo.cpp
Mips16HardFloatInfo.h
Mips16InstrFormats.td
Mips16InstrInfo.cpp
Mips16InstrInfo.h
Mips16InstrInfo.td [mips][mips64r6] Use JALR for indirect branches instead of JR (which is not available on MIPS32r6/MIPS64r6) 2014-07-09 10:21:59 +00:00
Mips16ISelDAGToDAG.cpp Make it possible for the Subtarget to change between function 2014-07-10 17:26:51 +00:00
Mips16ISelDAGToDAG.h
Mips16ISelLowering.cpp Remove dead code. 2014-07-03 00:44:28 +00:00
Mips16ISelLowering.h Make these preprocessor directives match all of the others in the port. 2014-07-03 00:44:31 +00:00
Mips16RegisterInfo.cpp
Mips16RegisterInfo.h
Mips32r6InstrFormats.td [mips][mips64r6] Correct cond names in the cmp.cond.[ds] instructions 2014-07-09 10:40:20 +00:00
Mips32r6InstrInfo.td [mips][mips64r6] Correct select patterns that have the condition or true/false values backwards 2014-07-09 10:47:26 +00:00
Mips64InstrInfo.td [mips][mips64r6] Use JALR for indirect branches instead of JR (which is not available on MIPS32r6/MIPS64r6) 2014-07-09 10:21:59 +00:00
Mips64r6InstrInfo.td [mips][mips64r6] Correct select patterns that have the condition or true/false values backwards 2014-07-09 10:47:26 +00:00
Mips.h
Mips.td [mips] Added FPXX modeless calling convention. 2014-07-10 15:36:12 +00:00
MipsAnalyzeImmediate.cpp
MipsAnalyzeImmediate.h
MipsAsmPrinter.cpp [mips] Add support for -modd-spreg/-mno-odd-spreg 2014-07-10 13:38:23 +00:00
MipsAsmPrinter.h [mips][mips64r6] Use JALR for indirect branches instead of JR (which is not available on MIPS32r6/MIPS64r6) 2014-07-09 10:21:59 +00:00
MipsCallingConv.td [mips] Emit two CFI offset directives per double precision SDC1/LDC1 2014-07-10 22:23:30 +00:00
MipsCodeEmitter.cpp [mips][mips64r6] Add LDPC instruction 2014-06-09 09:49:51 +00:00
MipsCondMov.td [mips][mips64r6] c.cond.fmt, mov[fntz], and mov[fntz].[ds] are not available on MIPS32r6/MIPS64r6 2014-06-12 13:39:06 +00:00
MipsConstantIslandPass.cpp
MipsDelaySlotFiller.cpp [mips][mips64r6] Replace m[tf]hi, m[tf]lo, mult, multu, dmult, dmultu, div, ddiv, divu, ddivu for MIPS32r6/MIPS64. 2014-06-12 10:44:10 +00:00
MipsDSPInstrFormats.td Make it possible for the Subtarget to change between function 2014-07-10 17:26:51 +00:00
MipsDSPInstrInfo.td
MipsFastISel.cpp Make it possible for the Subtarget to change between function 2014-07-10 17:26:51 +00:00
MipsFrameLowering.cpp
MipsFrameLowering.h So that we can include frame lowering in the subtarget, remove include 2014-07-02 23:29:55 +00:00
MipsInstrFormats.td [mips] Added support for assembling sdbbp. 2014-06-24 13:00:32 +00:00
MipsInstrFPU.td [mips] Use MFHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64 moves 2014-07-14 12:41:31 +00:00
MipsInstrInfo.cpp
MipsInstrInfo.h
MipsInstrInfo.td Make it possible for the Subtarget to change between function 2014-07-10 17:26:51 +00:00
MipsISelDAGToDAG.cpp Make it possible for the Subtarget to change between function 2014-07-10 17:26:51 +00:00
MipsISelDAGToDAG.h Make it possible for the Subtarget to change between function 2014-07-10 17:26:51 +00:00
MipsISelLowering.cpp Make it possible for ints/floats to return different values from getBooleanContents() 2014-07-10 10:18:12 +00:00
MipsISelLowering.h So that we can include target lowering in the subtarget, remove include 2014-07-02 23:18:40 +00:00
MipsJITInfo.cpp
MipsJITInfo.h
MipsLongBranch.cpp [mips][mips64r6] b(ge|lt)zal are not available on MIPS32r6/MIPS64r6 and bal is a normal instruction 2014-06-13 13:02:52 +00:00
MipsMachineFunction.cpp [mips] For the FP64A ABI, odd-numbered double-precision moves must not use mtc1/mfc1. 2014-07-14 13:08:14 +00:00
MipsMachineFunction.h [mips] For the FP64A ABI, odd-numbered double-precision moves must not use mtc1/mfc1. 2014-07-14 13:08:14 +00:00
MipsMCInstLower.cpp [mips] Optimize long branch for MIPS64 by removing %higher and %highest. 2014-05-27 18:53:06 +00:00
MipsMCInstLower.h [mips] Optimize long branch for MIPS64 by removing %higher and %highest. 2014-05-27 18:53:06 +00:00
MipsModuleISelDAGToDAG.cpp
MipsModuleISelDAGToDAG.h
MipsMSAInstrFormats.td Make it possible for the Subtarget to change between function 2014-07-10 17:26:51 +00:00
MipsMSAInstrInfo.td [mips][mips64r6] Add align and dalign 2014-05-15 12:06:36 +00:00
MipsOptimizePICCall.cpp
MipsOs16.cpp
MipsOs16.h
MipsRegisterInfo.cpp [mips] Added FPXX modeless calling convention. 2014-07-10 15:36:12 +00:00
MipsRegisterInfo.h
MipsRegisterInfo.td [mips][fp64a] Temporarily disable odd-numbered double-precision registers when using the FP64A ABI. 2014-07-16 15:34:07 +00:00
MipsRelocations.h
MipsSchedule.td
MipsSEFrameLowering.cpp [mips] For the FP64A ABI, odd-numbered double-precision moves must not use mtc1/mfc1. 2014-07-14 13:08:14 +00:00
MipsSEFrameLowering.h So that we can include frame lowering in the subtarget, remove include 2014-07-02 23:29:55 +00:00
MipsSEInstrInfo.cpp [mips] For the FP64A ABI, odd-numbered double-precision moves must not use mtc1/mfc1. 2014-07-14 13:08:14 +00:00
MipsSEInstrInfo.h [mips][mips64r6] Use JALR for returns instead of JR (which is not available on MIPS32r6/MIPS64r6) 2014-07-09 10:16:07 +00:00
MipsSEISelDAGToDAG.cpp Make it possible for the Subtarget to change between function 2014-07-10 17:26:51 +00:00
MipsSEISelDAGToDAG.h
MipsSEISelLowering.cpp So that we can include target lowering in the subtarget, remove include 2014-07-02 23:18:40 +00:00
MipsSEISelLowering.h Make these preprocessor directives match all of the others in the port. 2014-07-03 00:44:31 +00:00
MipsSelectionDAGInfo.cpp Have MipsSelectionDAGInfo constructor take a DataLayout rather 2014-06-27 04:38:30 +00:00
MipsSelectionDAGInfo.h Have MipsSelectionDAGInfo constructor take a DataLayout rather 2014-06-27 04:38:30 +00:00
MipsSERegisterInfo.cpp
MipsSERegisterInfo.h
MipsSubtarget.cpp Move Post RA Scheduling flag bit into SchedMachineModel 2014-07-15 22:39:58 +00:00
MipsSubtarget.h Move Post RA Scheduling flag bit into SchedMachineModel 2014-07-15 22:39:58 +00:00
MipsTargetMachine.cpp Move subtarget dependent features into the subtarget from the target 2014-07-03 00:10:24 +00:00
MipsTargetMachine.h Move subtarget dependent features into the subtarget from the target 2014-07-03 00:10:24 +00:00
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h
MipsTargetStreamer.h [mips] Add support for -modd-spreg/-mno-odd-spreg 2014-07-10 13:38:23 +00:00
MSA.txt