llvm-6502/lib/Target/ARM
Rafael Espindola 3ef39ca6a1 macros -> Inline functions
Lauros's patch


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32656 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-18 11:07:09 +00:00
..
.cvsignore
ARM.h move ARMCondCodeToString to ARMAsmPrinter.cpp 2006-11-02 15:00:02 +00:00
ARM.td
ARMAsmPrinter.cpp move ExtWeakSymbols to AsmPrinter 2006-12-18 03:37:18 +00:00
ARMFrameInfo.h
ARMInstrInfo.cpp Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 2006-11-27 23:37:22 +00:00
ARMInstrInfo.h
ARMInstrInfo.td more general matching of the MVN instruction 2006-12-12 17:10:13 +00:00
ARMISelDAGToDAG.cpp avoid using a constant table when a constant can be used inline 2006-12-14 18:58:37 +00:00
ARMMul.cpp Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 2006-11-27 23:37:22 +00:00
ARMRegisterInfo.cpp macros -> Inline functions 2006-12-18 11:07:09 +00:00
ARMRegisterInfo.h Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 2006-11-27 23:37:22 +00:00
ARMRegisterInfo.td initial support for frame pointers 2006-10-26 13:31:26 +00:00
ARMTargetAsmInfo.cpp print weak references 2006-12-06 13:35:10 +00:00
ARMTargetAsmInfo.h
ARMTargetMachine.cpp revert previous patch 2006-11-03 03:08:28 +00:00
ARMTargetMachine.h
Makefile
README.txt add note 2006-12-11 23:56:10 +00:00

//===---------------------------------------------------------------------===//
// Random ideas for the ARM backend.
//===---------------------------------------------------------------------===//

Consider implementing a select with two conditional moves:

cmp x, y
moveq dst, a
movne dst, b

----------------------------------------------------------


%tmp1 = shl int %b, ubyte %c
%tmp4 = add int %a, %tmp1

compiles to

add r0, r0, r1, lsl r2

but

%tmp1 = shl int %b, ubyte %c
%tmp4 = add int %tmp1, %a

compiles to
mov r1, r1, lsl r2
add r0, r1, r0

---------------------------------------------------------
%tmp1 = shl int %b, ubyte 4
%tmp2 = add int %a, %tmp1

compiles to

mov r2, #4
add r0, r0, r1, lsl r2

should be

add r0, r0, r1, lsl #4

----------------------------------------------------------

add an offset to FLDS/FLDD/FSTD/FSTS addressing mode

----------------------------------------------------------

the function

void %f() {
entry:
	call void %g( int 1, int 2, int 3, int 4, int 5 )
	ret void
}

declare void %g(int, int, int, int, int)

Only needs 8 bytes of stack space. We currently allocate 16.

----------------------------------------------------------

32 x 32 -> 64 multiplications currently uses two instructions. We
should try to declare smull and umull as returning two values.

----------------------------------------------------------

Implement addressing modes 2 (ldrb) and 3 (ldrsb)

----------------------------------------------------------