Hal Finkel eda8f6708d PPC: Optimize rldicl generation for masked shifts ... Masking operations (where only some number of the low bits are being kept) are selected to rldicl(x, 0, mb). If x is a logical right shift (which would become rldicl(y, 64-n, n)), we might be able to fold the two instructions together: rldicl(rldicl(x, 64-n, n), 0, mb) -> rldicl(x, 64-n, mb) for n <= mb The right shift is really a left rotate followed by a mask, and if the explicit mask is a more-restrictive sub-mask of the mask implied by the shift, only one rldicl is needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195185 91177308-0d34-0410-b5e6-96231b3b80d8		2013-11-20 01:10:15 +00:00
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AArch64	Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.	2013-11-19 02:17:05 +00:00
ARM	[PR17978] Mark two ARM/fast-isel tests as XFAIL:vg_leak due to GV.	2013-11-18 13:50:19 +00:00
CPP	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00
Generic	Error if we see an alias to a declaration.	2013-11-14 13:58:06 +00:00
Hexagon	TBAA: remove !tbaa from testing cases when they are not needed.	2013-09-30 18:17:35 +00:00
Inputs	Debug Info: add an identifier field to DICompositeType.	2013-08-26 22:39:55 +00:00
Mips	[Mips] Adjust float ABI settings in case of MIPS16 mode.	2013-11-19 12:20:17 +00:00
MSP430	Make sure SP is always aligned on a 2 byte boundary	2013-10-24 09:32:31 +00:00
NVPTX	[NVPTX] Fix handling of indirect calls	2013-11-15 12:30:04 +00:00
PowerPC	PPC: Optimize rldicl generation for masked shifts	2013-11-20 01:10:15 +00:00
R600	R600/SI: Fix moveToVALU when the first operand is VSrc.	2013-11-18 20:09:55 +00:00
SPARC	[SparcV9] Handle i64 <-> float conversions in sparcv9 mode.	2013-11-03 12:28:40 +00:00
SystemZ	[SystemZ] Automatically detect zEC12 and z196 hosts	2013-10-31 12:14:17 +00:00
Thumb	17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets	2013-10-17 19:52:05 +00:00
Thumb2	Enable generating legacy IT block for AArch32	2013-11-13 18:29:49 +00:00
X86	Fix assembly operands for the SSE2 cvtsd2ss instruction.	2013-11-19 14:36:00 +00:00
XCore	Error if we see an alias to a declaration.	2013-11-14 13:58:06 +00:00