mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-03-05 12:31:46 +00:00
d0ef9f3115
This commit verifies that the parsed machine instructions contain the implicit register operands as specified by the MCInstrDesc. Variadic and call instructions aren't verified. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10781 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241537 91177308-0d34-0410-b5e6-96231b3b80d8
38 lines
722 B
YAML
38 lines
722 B
YAML
# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
|
|
|
|
--- |
|
|
|
|
define i32 @foo(i32* %p) {
|
|
entry:
|
|
%a = load i32, i32* %p
|
|
%b = icmp sle i32 %a, 10
|
|
br i1 %b, label %yes, label %nah
|
|
|
|
yes:
|
|
ret i32 0
|
|
|
|
nah:
|
|
ret i32 %a
|
|
}
|
|
|
|
...
|
|
---
|
|
name: foo
|
|
body:
|
|
- id: 0
|
|
name: entry
|
|
instructions:
|
|
- '%eax = MOV32rm %rdi, 1, _, 0, _'
|
|
- 'CMP32ri8 %eax, 10, implicit-def %eflags'
|
|
# CHECK: [[@LINE+1]]:18: expected a number after '%bb.'
|
|
- 'JG_1 %bb.nah, implicit %eflags'
|
|
- id: 1
|
|
name: yes
|
|
instructions:
|
|
- '%eax = MOV32r0 implicit-def %eflags'
|
|
- id: 2
|
|
name: nah
|
|
instructions:
|
|
- 'RETQ %eax'
|
|
...
|