llvm-6502/test/CodeGen/Hexagon/static.ll
Andrew Trick ee498d3254 VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).
This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.

Patch by Sergei Larin!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149547 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 22:13:57 +00:00

21 lines
472 B
LLVM

; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s
@num = external global i32
@acc = external global i32
@val = external global i32
; CHECK: CONST32(#num)
; CHECK: CONST32(#acc)
; CHECK: CONST32(#val)
define void @foo() nounwind {
entry:
%0 = load i32* @num, align 4
%1 = load i32* @acc, align 4
%mul = mul nsw i32 %0, %1
%2 = load i32* @val, align 4
%add = add nsw i32 %mul, %2
store i32 %add, i32* @num, align 4
ret void
}