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https://github.com/c64scene-ar/llvm-6502.git
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b95fc31aa2
and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788 91177308-0d34-0410-b5e6-96231b3b80d8
97 lines
3.4 KiB
C++
97 lines
3.4 KiB
C++
//===-- PTXMCTargetDesc.cpp - PTX Target Descriptions -----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides PTX specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "PTXMCTargetDesc.h"
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#include "PTXMCAsmInfo.h"
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#include "InstPrinter/PTXInstPrinter.h"
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#include "llvm/MC/MCCodeGenInfo.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/TargetRegistry.h"
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#define GET_INSTRINFO_MC_DESC
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#include "PTXGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "PTXGenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "PTXGenRegisterInfo.inc"
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using namespace llvm;
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static MCInstrInfo *createPTXMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitPTXMCInstrInfo(X);
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return X;
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}
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static MCRegisterInfo *createPTXMCRegisterInfo(StringRef TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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// PTX does not have a return address register.
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InitPTXMCRegisterInfo(X, 0);
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return X;
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}
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static MCSubtargetInfo *createPTXMCSubtargetInfo(StringRef TT, StringRef CPU,
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StringRef FS) {
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MCSubtargetInfo *X = new MCSubtargetInfo();
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InitPTXMCSubtargetInfo(X, TT, CPU, FS);
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return X;
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}
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static MCCodeGenInfo *createPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM,
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CodeModel::Model CM,
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CodeGenOpt::Level OL) {
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MCCodeGenInfo *X = new MCCodeGenInfo();
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X->InitMCCodeGenInfo(RM, CM, OL);
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return X;
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}
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static MCInstPrinter *createPTXMCInstPrinter(const Target &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCSubtargetInfo &STI) {
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assert(SyntaxVariant == 0 && "We only have one syntax variant");
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return new PTXInstPrinter(MAI, STI);
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}
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extern "C" void LLVMInitializePTXTargetMC() {
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// Register the MC asm info.
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RegisterMCAsmInfo<PTXMCAsmInfo> X(ThePTX32Target);
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RegisterMCAsmInfo<PTXMCAsmInfo> Y(ThePTX64Target);
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// Register the MC codegen info.
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TargetRegistry::RegisterMCCodeGenInfo(ThePTX32Target, createPTXMCCodeGenInfo);
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TargetRegistry::RegisterMCCodeGenInfo(ThePTX64Target, createPTXMCCodeGenInfo);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(ThePTX32Target, createPTXMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(ThePTX64Target, createPTXMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(ThePTX32Target, createPTXMCRegisterInfo);
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TargetRegistry::RegisterMCRegInfo(ThePTX64Target, createPTXMCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(ThePTX32Target,
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createPTXMCSubtargetInfo);
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TargetRegistry::RegisterMCSubtargetInfo(ThePTX64Target,
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createPTXMCSubtargetInfo);
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// Register the MCInstPrinter.
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TargetRegistry::RegisterMCInstPrinter(ThePTX32Target, createPTXMCInstPrinter);
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TargetRegistry::RegisterMCInstPrinter(ThePTX64Target, createPTXMCInstPrinter);
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}
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