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c09856b535
We will make them delay slot forms if there is something that can be placed in the delay slot during a separate pass. Mips16 extended instructions cannot be placed in delay slots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166990 91177308-0d34-0410-b5e6-96231b3b80d8
35 lines
1.2 KiB
LLVM
35 lines
1.2 KiB
LLVM
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=C1
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; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=C2
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; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=PE
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;
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; re-enable this when mips16's jalr is fixed.
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; DISABLED: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=SR
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@.str = private unnamed_addr constant [13 x i8] c"hello world\0A\00", align 1
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define i32 @main() nounwind {
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entry:
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%call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0))
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ret i32 0
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; SR: .set mips16 # @main
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; SR: save $ra, [[FS:[0-9]+]]
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; PE: li $[[T1:[0-9]+]], %hi(_gp_disp)
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; PE: addiu $[[T2:[0-9]+]], $pc, %lo(_gp_disp)
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; PE: sll $[[T3:[0-9]+]], $[[T1]], 16
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; C1: lw ${{[0-9]+}}, %got($.str)(${{[0-9]+}})
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; C2: lw ${{[0-9]+}}, %call16(printf)(${{[0-9]+}})
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; C1: addiu ${{[0-9]+}}, %lo($.str)
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; C2: move $25, ${{[0-9]+}}
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; C1: move $gp, ${{[0-9]+}}
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; C1: jalrc ${{[0-9]+}}
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; SR: restore $ra, [[FS]]
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; PE: li $2, 0
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; PE: jrc $ra
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}
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declare i32 @printf(i8*, ...)
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