Bill Wendling a656b63ee4 Narrow right shifts need to encode their immediates differently from a normal ...

shift.

   16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0>
   32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0>
   64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126723 91177308-0d34-0410-b5e6-96231b3b80d8

2011-03-01 01:00:59 +00:00

..

ARM

Narrow right shifts need to encode their immediates differently from a normal

2011-03-01 01:00:59 +00:00

AsmParser

Move arch specific tests in arch specific directories.

2011-02-24 19:06:27 +00:00

COFF

Don't use PadSectionToAlignment on windows.

2010-12-06 03:03:44 +00:00

Disassembler

Fix the arm's disassembler for blx that was building an MCInst without the

2011-02-28 18:46:31 +00:00

ELF

split this test into arch specific pieces, so the ARM

2011-02-25 19:06:35 +00:00

MachO

Move arch specific tests in arch specific directories.

2011-02-24 19:06:27 +00:00

MBlaze

Teach the MBlaze asm parser how to parse special purpose register names.

2010-12-20 20:43:24 +00:00

X86

Use the same (%dx) hack for in[bwl] as for out[bwl].

2011-02-22 20:40:09 +00:00