Evan Cheng 32dfbeada7 EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like ... (almost) a register copy. However, it always coalesced to the register of the RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub- register uses which adds subtle complications to load folding, spiller rewrite, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42899 91177308-0d34-0410-b5e6-96231b3b80d8		2007-10-12 08:50:34 +00:00
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CallingConvLower.cpp	propagate struct size and alignment of byval arguments to the DAG	2007-08-10 14:44:42 +00:00
DAGCombiner.cpp	Correct swapped arguments to getConstant.	2007-10-10 09:54:50 +00:00
LegalizeDAG.cpp	PPC long double. Implement a couple more conversions.	2007-10-12 01:37:08 +00:00
Makefile	For PR780:	2006-07-26 16:18:00 +00:00
ScheduleDAG.cpp	EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like	2007-10-12 08:50:34 +00:00
ScheduleDAGList.cpp	Trim some unneeded fields.	2007-09-28 19:24:24 +00:00
ScheduleDAGRRList.cpp	EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like	2007-10-12 08:50:34 +00:00
SelectionDAG.cpp	Add an ISD::FPOW node type.	2007-10-11 23:06:37 +00:00
SelectionDAGISel.cpp	Add intrinsics for sin, cos, and pow. These use llvm_anyfloat_ty, and so	2007-10-12 00:01:22 +00:00
SelectionDAGPrinter.cpp	Added major new capabilities to scheduler (only BURR for now) to support physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered.	2007-09-25 01:54:36 +00:00
TargetLowering.cpp	Add runtime library names for pow.	2007-10-11 23:09:10 +00:00