llvm-6502/lib/CodeGen/SelectionDAG
Nate Begeman f15485a8d0 SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27156 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-27 01:32:24 +00:00
..
DAGCombiner.cpp Don't call SimplifyDemandedBits on vectors 2006-03-25 22:19:00 +00:00
LegalizeDAG.cpp Allow targets to custom lower their own intrinsics if desired. 2006-03-26 09:12:51 +00:00
Makefile Change Library Names Not To Conflict With Others When Installed 2004-10-27 23:18:45 +00:00
ScheduleDAG.cpp fix spello 2006-03-24 07:15:07 +00:00
ScheduleDAGList.cpp Don't advance the hazard recognizer when there are no hazards and no instructions 2006-03-12 09:01:41 +00:00
ScheduleDAGSimple.cpp Move simple-selector-specific types to the simple selector. 2006-03-10 07:51:18 +00:00
SelectionDAG.cpp Add ISD::isBuildVectorAllZeros predicate 2006-03-26 09:50:58 +00:00
SelectionDAGISel.cpp SelectionDAGISel can now natively handle Switch instructions, in the same 2006-03-27 01:32:24 +00:00
SelectionDAGPrinter.cpp print arbitrary constant pool entries 2006-03-05 09:38:03 +00:00
TargetLowering.cpp Typo 2006-03-23 23:24:51 +00:00