Tom Stellard f17a95a681 R600/SI: Add VCC as an implict def of SI_KILL ... When SI_KILL has a register operand, its lowered form writes to vcc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236307 91177308-0d34-0410-b5e6-96231b3b80d8		2015-05-01 03:44:09 +00:00
..
AArch64	[AArch64] Fix bad register class constraint in fast-isel for TST instruction.	2015-04-30 22:27:20 +00:00
ARM	[ARM][TEST] Strengthen test against smarter reg alloc.	2015-05-01 00:45:55 +00:00
BPF
CPP
Generic	XFAIL test/CodeGen/Generic/MachineBranchProb.ll on Hexagon (PR23377)	2015-04-30 01:59:04 +00:00
Hexagon	IR: Give 'DI' prefix to debug info metadata	2015-04-29 16:38:44 +00:00
Inputs	IR: Give 'DI' prefix to debug info metadata	2015-04-29 16:38:44 +00:00
Mips	[mips][msa] Rename main check prefix to 'ALL' in basic operations tests. NFC	2015-04-30 09:57:37 +00:00
MSP430
NVPTX
PowerPC	IR: Give 'DI' prefix to debug info metadata	2015-04-29 16:38:44 +00:00
R600	R600/SI: Add VCC as an implict def of SI_KILL	2015-05-01 03:44:09 +00:00
SPARC
SystemZ
Thumb	IR: Give 'DI' prefix to debug info metadata	2015-04-29 16:38:44 +00:00
Thumb2
WinEH	Flip r236172 testcase RUN option ordering for BSD sed(1). NFC.	2015-04-30 00:07:34 +00:00
X86	[X86] Use 4 byte preferred aggregate alignment on Win32	2015-04-30 22:11:59 +00:00
XCore	IR: Give 'DI' prefix to debug info metadata	2015-04-29 16:38:44 +00:00