mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-26 23:29:22 +00:00
This affects new intrinsics only. What surprises me is that v32i8 still works. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212831 91177308-0d34-0410-b5e6-96231b3b80d8
290 lines
16 KiB
LLVM
290 lines
16 KiB
LLVM
;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck %s
|
|
|
|
;CHECK-LABEL: @sample
|
|
;CHECK: IMAGE_SAMPLE_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_cl
|
|
;CHECK: IMAGE_SAMPLE_CL_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_cl() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.cl.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_d
|
|
;CHECK: IMAGE_SAMPLE_D_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_d() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.d.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_d_cl
|
|
;CHECK: IMAGE_SAMPLE_D_CL_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_d_cl() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.d.cl.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_l
|
|
;CHECK: IMAGE_SAMPLE_L_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_l() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.l.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_b
|
|
;CHECK: IMAGE_SAMPLE_B_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_b() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.b.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_b_cl
|
|
;CHECK: IMAGE_SAMPLE_B_CL_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_b_cl() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.b.cl.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_lz
|
|
;CHECK: IMAGE_SAMPLE_LZ_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_lz() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.lz.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_cd
|
|
;CHECK: IMAGE_SAMPLE_CD_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_cd() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.cd.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_cd_cl
|
|
;CHECK: IMAGE_SAMPLE_CD_CL_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_cd_cl() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.cd.cl.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_c
|
|
;CHECK: IMAGE_SAMPLE_C_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_c() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.c.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_c_cl
|
|
;CHECK: IMAGE_SAMPLE_C_CL_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_c_cl() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.c.cl.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_c_d
|
|
;CHECK: IMAGE_SAMPLE_C_D_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_c_d() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.c.d.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_c_d_cl
|
|
;CHECK: IMAGE_SAMPLE_C_D_CL_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_c_d_cl() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.c.d.cl.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_c_l
|
|
;CHECK: IMAGE_SAMPLE_C_L_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_c_l() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.c.l.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_c_b
|
|
;CHECK: IMAGE_SAMPLE_C_B_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_c_b() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.c.b.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_c_b_cl
|
|
;CHECK: IMAGE_SAMPLE_C_B_CL_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_c_b_cl() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.c.b.cl.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_c_lz
|
|
;CHECK: IMAGE_SAMPLE_C_LZ_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_c_lz() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.c.lz.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_c_cd
|
|
;CHECK: IMAGE_SAMPLE_C_CD_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_c_cd() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.c.cd.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @sample_c_cd_cl
|
|
;CHECK: IMAGE_SAMPLE_C_CD_CL_O {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @sample_c_cd_cl() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.image.sample.c.cd.cl.o.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
|
|
declare <4 x float> @llvm.SI.image.sample.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.cl.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.d.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.d.cl.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.l.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.b.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.b.cl.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.lz.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.cd.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.cd.cl.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
|
|
declare <4 x float> @llvm.SI.image.sample.c.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.c.cl.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.c.d.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.c.d.cl.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.c.l.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.c.b.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.c.b.cl.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.c.lz.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.c.cd.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.image.sample.c.cd.cl.o.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
|
|
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
|
|
|
|
attributes #0 = { "ShaderType"="0" }
|
|
attributes #1 = { nounwind readnone }
|