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llvm-6502/lib/Target/Mips
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Daniel Sanders f1ef27e6e3 [mips][msa] MSA requires FR=1 mode (64-bit FPU register file). Report fatal error when using it in FR=0 mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191498 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-27 10:08:31 +00:00
..
AsmParser
[mips][msa] Direct Object Emission support for the MSA instruction set.
2013-09-25 23:50:44 +00:00
Disassembler
[mips][msa] Direct Object Emission for 3R instructions.
2013-09-26 00:09:46 +00:00
InstPrinter
[mips][msa] Added support for matching shf from normal IR (i.e. not intrinsics)
2013-09-24 14:20:00 +00:00
MCTargetDesc
Generate compact unwind encoding from CFI directives.
2013-09-09 02:37:14 +00:00
TargetInfo
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CMakeLists.txt
Turn MipsOptimizeMathLibCalls into a target-independent scalar transform
2013-08-23 10:27:02 +00:00
LLVMBuild.txt
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Makefile
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MicroMipsInstrFormats.td
Support for misc microMIPS instructions.
2013-09-14 06:49:25 +00:00
MicroMipsInstrInfo.td
Support for microMIPS DIV instructions.
2013-09-14 07:15:21 +00:00
Mips16FrameLowering.cpp
Add the saving of S2. This is needed for some of the floating point
2013-08-04 23:56:53 +00:00
Mips16FrameLowering.h
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Mips16HardFloat.cpp
Fix a bad typo in the inline assembly code for mips16 pic fp stubs
2013-09-25 20:58:50 +00:00
Mips16HardFloat.h
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Mips16InstrFormats.td
Create a pattern for the "trap" instruction.
2013-08-07 04:00:26 +00:00
Mips16InstrInfo.cpp
Remove unused stdio.h includes
2013-08-18 08:29:51 +00:00
Mips16InstrInfo.h
Clean up code for Mips16 large frame handling.
2013-08-04 01:13:25 +00:00
Mips16InstrInfo.td
Fix two issues regarding Got pointer (GP) setup.
2013-09-18 22:46:09 +00:00
Mips16ISelDAGToDAG.cpp
Fix two issues regarding Got pointer (GP) setup.
2013-09-18 22:46:09 +00:00
Mips16ISelDAGToDAG.h
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Mips16ISelLowering.cpp
Revert r191350.
2013-09-25 00:52:34 +00:00
Mips16ISelLowering.h
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Mips16RegisterInfo.cpp
Clean up code for Mips16 large frame handling.
2013-08-04 01:13:25 +00:00
Mips16RegisterInfo.h
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Mips64InstrInfo.td
[mips] Add definition of instruction "drotr32" (double rotate right plus 32).
2013-09-07 00:18:01 +00:00
Mips.h
Turn MipsOptimizeMathLibCalls into a target-independent scalar transform
2013-08-23 10:27:02 +00:00
Mips.td
[Mips][msa] Added initial MSA support.
2013-08-13 20:54:07 +00:00
MipsAnalyzeImmediate.cpp
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MipsAnalyzeImmediate.h
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MipsAsmPrinter.cpp
[mips] Rename register classes CPURegs and CPU64Regs.
2013-08-06 23:08:38 +00:00
MipsAsmPrinter.h
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MipsCallingConv.td
[mips] Add support for calling convention CC_MipsO32_FP64, which is used when the
2013-08-20 23:38:40 +00:00
MipsCodeEmitter.cpp
[mips] Define "trap" as a pseudo instruction that turns into "break 0, 0".
2013-09-06 23:52:46 +00:00
MipsCondMov.td
[mips] Set instruction itineraries of loads, stores and conditional moves.
2013-09-06 23:28:24 +00:00
MipsConstantIslandPass.cpp
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MipsDelaySlotFiller.cpp
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MipsDSPInstrFormats.td
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MipsDSPInstrInfo.td
[mips] Use uimm5 and uimm6 instead of shamt and imm, if the immediate has to fit
2013-09-07 00:02:02 +00:00
MipsFrameLowering.cpp
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MipsFrameLowering.h
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MipsInstrFormats.td
Fixed bug when generating Load Upper Immediate microMIPS instruction.
2013-09-14 07:35:41 +00:00
MipsInstrFPU.td
This patch implements Mips load/store instructions from/to coprocessor 2. Test cases are added.
2013-09-16 10:29:42 +00:00
MipsInstrInfo.cpp
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MipsInstrInfo.h
…
MipsInstrInfo.td
[mips] MUL should clobber HI0 and LO0.
2013-09-20 21:22:28 +00:00
MipsISelDAGToDAG.cpp
[mips][msa] Remove the VSPLAT and VSPLATD nodes in favour of matching BUILD_VECTOR.
2013-09-24 13:33:07 +00:00
MipsISelDAGToDAG.h
[mips][msa] Remove the VSPLAT and VSPLATD nodes in favour of matching BUILD_VECTOR.
2013-09-24 13:33:07 +00:00
MipsISelLowering.cpp
Revert r191350.
2013-09-25 00:52:34 +00:00
MipsISelLowering.h
Revert r191350.
2013-09-25 00:52:34 +00:00
MipsJITInfo.cpp
[test commit] Minor comment change.
2013-07-24 13:02:35 +00:00
MipsJITInfo.h
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MipsLongBranch.cpp
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MipsMachineFunction.cpp
[mips] Rename register classes CPURegs and CPU64Regs.
2013-08-06 23:08:38 +00:00
MipsMachineFunction.h
[mips] Move public functions to the beginning of the class definition.
2013-09-25 00:34:42 +00:00
MipsMCInstLower.cpp
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MipsMCInstLower.h
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MipsModuleISelDAGToDAG.cpp
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MipsModuleISelDAGToDAG.h
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MipsMSAInstrFormats.td
[mips][msa] Direct Object Emission for 3RF instructions.
2013-09-26 21:31:43 +00:00
MipsMSAInstrInfo.td
[mips][msa] Direct Object Emission for 3RF instructions.
2013-09-26 21:31:43 +00:00
MipsOs16.cpp
Make nomips16 mask not repeat if it ends with a '.'.
2013-09-23 22:36:11 +00:00
MipsOs16.h
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MipsRegisterInfo.cpp
[mips][msa] Added cfcmsa, and ctcmsa
2013-08-28 10:26:24 +00:00
MipsRegisterInfo.h
[mips] Resolve register classes dynamically using ptr_rc to reduce the number of
2013-08-20 21:08:22 +00:00
MipsRegisterInfo.td
[mips][msa] Direct Object Emission support for the MSA instruction set.
2013-09-25 23:50:44 +00:00
MipsRelocations.h
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MipsSchedule.td
[mips] Define instruction itineraries IIArith and IILogic.
2013-07-31 00:55:34 +00:00
MipsSEFrameLowering.cpp
[mips] Define register class FGRH32 for the high half of the 64-bit floating
2013-08-20 22:58:56 +00:00
MipsSEFrameLowering.h
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MipsSEInstrInfo.cpp
[mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index double
2013-09-07 00:52:30 +00:00
MipsSEInstrInfo.h
[mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index double
2013-09-07 00:52:30 +00:00
MipsSEISelDAGToDAG.cpp
[mips][msa] Remove the VSPLAT and VSPLATD nodes in favour of matching BUILD_VECTOR.
2013-09-24 13:33:07 +00:00
MipsSEISelDAGToDAG.h
[mips][msa] Remove the VSPLAT and VSPLATD nodes in favour of matching BUILD_VECTOR.
2013-09-24 13:33:07 +00:00
MipsSEISelLowering.cpp
[mips][msa] Expand all truncstores and loadexts for MSA as well as DSP
2013-09-27 09:44:59 +00:00
MipsSEISelLowering.h
[mips][msa] Added support for matching vshf from normal IR (i.e. not intrinsics)
2013-09-24 14:02:15 +00:00
MipsSelectionDAGInfo.cpp
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MipsSelectionDAGInfo.h
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MipsSERegisterInfo.cpp
[mips] Rename register classes CPURegs and CPU64Regs.
2013-08-06 23:08:38 +00:00
MipsSERegisterInfo.h
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MipsSubtarget.cpp
[mips][msa] MSA requires FR=1 mode (64-bit FPU register file). Report fatal error when using it in FR=0 mode.
2013-09-27 10:08:31 +00:00
MipsSubtarget.h
Fix a problem with dual mips16/mips32 mode. When the underlying processor
2013-08-30 19:40:56 +00:00
MipsTargetMachine.cpp
Turn MipsOptimizeMathLibCalls into a target-independent scalar transform
2013-08-23 10:27:02 +00:00
MipsTargetMachine.h
[mips] Implement MipsTargetMachine::getInstrItineraryData().
2013-07-12 23:33:22 +00:00
MipsTargetObjectFile.cpp
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MipsTargetObjectFile.h
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