llvm-6502/lib/Target/Alpha
Jakob Stoklund Olesen f28987b76e Use set operations instead of plain lists to enumerate register classes.
This simplifies many of the target description files since it is common
for register classes to be related or contain sequences of numbered
registers.

I have verified that this doesn't change the files generated by TableGen
for ARM and X86. It alters the allocation order of MBlaze GPR and Mips
FGR32 registers, but I believe the change is benign.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:28:14 +00:00
..
TargetInfo
Alpha.h First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place 2010-11-15 00:06:54 +00:00
Alpha.td Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
AlphaAsmPrinter.cpp move all the target's asmprinters into the main target. The piece 2010-11-14 18:43:56 +00:00
AlphaBranchSelector.cpp Reapply r110396, with fixes to appease the Linux buildbot gods. 2010-08-06 18:33:48 +00:00
AlphaCallingConv.td
AlphaFrameLowering.cpp Teach frame lowering to ignore debug values after the terminators. 2011-01-13 21:28:52 +00:00
AlphaFrameLowering.h Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. 2011-01-10 12:39:04 +00:00
AlphaInstrFormats.td
AlphaInstrInfo.cpp Remove the isMoveInstr() hook. 2010-07-16 22:35:46 +00:00
AlphaInstrInfo.h Remove the isMoveInstr() hook. 2010-07-16 22:35:46 +00:00
AlphaInstrInfo.td Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
AlphaISelDAGToDAG.cpp rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for 2010-12-21 02:38:05 +00:00
AlphaISelLowering.cpp Add a parameter to CCState so that it can access the MachineFunction. 2011-06-08 23:55:35 +00:00
AlphaISelLowering.h Make the logic for determining function alignment more explicit. No functionality change. 2011-05-06 20:34:06 +00:00
AlphaLLRP.cpp Reapply r110396, with fixes to appease the Linux buildbot gods. 2010-08-06 18:33:48 +00:00
AlphaMachineFunctionInfo.h
AlphaMCAsmInfo.cpp Don't pass StringRef by reference. 2010-07-14 22:38:02 +00:00
AlphaMCAsmInfo.h Don't pass StringRef by reference. 2010-07-14 22:38:02 +00:00
AlphaRegisterInfo.cpp Use the dwarf->llvm mapping to print register names in the cfi 2011-05-30 20:20:15 +00:00
AlphaRegisterInfo.h Use the dwarf->llvm mapping to print register names in the cfi 2011-05-30 20:20:15 +00:00
AlphaRegisterInfo.td Use set operations instead of plain lists to enumerate register classes. 2011-06-15 23:28:14 +00:00
AlphaRelocations.h
AlphaSchedule.td Add support to model pipeline bypass / forwarding. 2010-09-28 23:50:49 +00:00
AlphaSelectionDAGInfo.cpp
AlphaSelectionDAGInfo.h
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetMachine.cpp Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. 2011-01-10 12:39:04 +00:00
AlphaTargetMachine.h Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. 2011-01-10 12:39:04 +00:00
CMakeLists.txt Use explicit add_subdirectory's for LLVM target sublibraries instead 2011-02-20 02:55:27 +00:00
Makefile move all the target's asmprinters into the main target. The piece 2010-11-14 18:43:56 +00:00
README.txt Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum across bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extensions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html