mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-22 07:32:48 +00:00
a7603982db
The DSP instructions in the Thumb2 instruction set are an optional extension in the Cortex-M* archtitecture. When present, the implementation is considered an "ARMv7E-M implementation," and when not, an "ARMv7-M implementation." Add a subtarget feature hook for the v7e-m instructions and hook it up. The cortex-m3 cpu is an example of a v7m implementation, while the cortex-m4 is a v7e-m implementation. rdar://9572992 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134261 91177308-0d34-0410-b5e6-96231b3b80d8
12 lines
439 B
LLVM
12 lines
439 B
LLVM
; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk,+t2dsp | FileCheck %s
|
|
|
|
define i32 @f3(i32 %a, i16 %x, i32 %y) {
|
|
; CHECK: f3
|
|
; CHECK: smlabt r0, r1, r2, r0
|
|
%tmp = sext i16 %x to i32 ; <i32> [#uses=1]
|
|
%tmp2 = ashr i32 %y, 16 ; <i32> [#uses=1]
|
|
%tmp3 = mul i32 %tmp2, %tmp ; <i32> [#uses=1]
|
|
%tmp5 = add i32 %tmp3, %a ; <i32> [#uses=1]
|
|
ret i32 %tmp5
|
|
}
|