Jyotsna Verma f2c4db97e1 Hexagon: Add testcase for post-increment store instructions. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174419 91177308-0d34-0410-b5e6-96231b3b80d8		2013-02-05 18:23:51 +00:00
..
AArch64	Revert r174343, "When the target-independent DAGCombiner inferred a higher alignment for a load,"	2013-02-05 14:44:16 +00:00
ARM	[SjLj Prepare] When demoting an invoke instructions to the stack, if the normal	2013-02-05 18:23:10 +00:00
CPP
Generic	For inline asm:	2013-01-11 18:12:39 +00:00
Hexagon	Hexagon: Add testcase for post-increment store instructions.	2013-02-05 18:23:51 +00:00
MBlaze
Mips	This patch that sets the EmitAlias flag in td files	2013-02-05 08:32:10 +00:00
MSP430
NVPTX	[NVPTX] Fix crash with unnamed struct arguments	2012-12-05 20:50:28 +00:00
PowerPC	Disable a couple more vector splat optimizations on PPC.	2013-02-04 15:52:32 +00:00
R600	R600: Add tests for instruction predicates	2013-02-05 17:09:13 +00:00
SI	Add R600 backend	2012-12-11 21:25:42 +00:00
SPARC
Thumb
Thumb2	FileCheck-ify some grep tests	2013-01-25 22:11:46 +00:00
X86	Add a test case for PR14750.	2013-02-05 18:04:15 +00:00
XCore