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https://github.com/c64scene-ar/llvm-6502.git
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This helps avoid redundant instructions to unpack, and repack the vectors. Ideally we could recognize that pattern and eliminate it. Currently v4i8 and other small element type vectors are scalarized, so this has the added bonus of avoiding that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213031 91177308-0d34-0410-b5e6-96231b3b80d8
167 lines
5.4 KiB
LLVM
167 lines
5.4 KiB
LLVM
; RUN: llc -march=r600 -mcpu=tahiti < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; FUNC-LABEL: @test_copy_v4i8
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; SI: BUFFER_LOAD_DWORD [[REG:v[0-9]+]]
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; SI: BUFFER_STORE_DWORD [[REG]]
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; SI: S_ENDPGM
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define void @test_copy_v4i8(<4 x i8> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) nounwind {
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%val = load <4 x i8> addrspace(1)* %in, align 4
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @test_copy_v4i8_x2
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; SI: BUFFER_LOAD_DWORD [[REG:v[0-9]+]]
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; SI: BUFFER_STORE_DWORD [[REG]]
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; SI: BUFFER_STORE_DWORD [[REG]]
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; SI: S_ENDPGM
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define void @test_copy_v4i8_x2(<4 x i8> addrspace(1)* %out0, <4 x i8> addrspace(1)* %out1, <4 x i8> addrspace(1)* %in) nounwind {
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%val = load <4 x i8> addrspace(1)* %in, align 4
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out0, align 4
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out1, align 4
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ret void
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}
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; FUNC-LABEL: @test_copy_v4i8_x3
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; SI: BUFFER_LOAD_DWORD [[REG:v[0-9]+]]
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; SI: BUFFER_STORE_DWORD [[REG]]
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; SI: BUFFER_STORE_DWORD [[REG]]
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; SI: BUFFER_STORE_DWORD [[REG]]
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; SI: S_ENDPGM
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define void @test_copy_v4i8_x3(<4 x i8> addrspace(1)* %out0, <4 x i8> addrspace(1)* %out1, <4 x i8> addrspace(1)* %out2, <4 x i8> addrspace(1)* %in) nounwind {
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%val = load <4 x i8> addrspace(1)* %in, align 4
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out0, align 4
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out1, align 4
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out2, align 4
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ret void
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}
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; FUNC-LABEL: @test_copy_v4i8_x4
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; SI: BUFFER_LOAD_DWORD [[REG:v[0-9]+]]
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; SI: BUFFER_STORE_DWORD [[REG]]
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; SI: BUFFER_STORE_DWORD [[REG]]
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; SI: BUFFER_STORE_DWORD [[REG]]
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; SI: BUFFER_STORE_DWORD [[REG]]
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; SI: S_ENDPGM
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define void @test_copy_v4i8_x4(<4 x i8> addrspace(1)* %out0, <4 x i8> addrspace(1)* %out1, <4 x i8> addrspace(1)* %out2, <4 x i8> addrspace(1)* %out3, <4 x i8> addrspace(1)* %in) nounwind {
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%val = load <4 x i8> addrspace(1)* %in, align 4
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out0, align 4
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out1, align 4
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out2, align 4
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out3, align 4
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ret void
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}
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; FUNC-LABEL: @test_copy_v4i8_extra_use
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; SI: BUFFER_LOAD_UBYTE
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; SI: BUFFER_LOAD_UBYTE
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; SI: BUFFER_LOAD_UBYTE
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; SI: BUFFER_LOAD_UBYTE
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; SI-DAG: V_ADD
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; SI-DAG: V_ADD
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; SI-DAG: V_ADD
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; SI-DAG: V_ADD
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI_DAG: BUFFER_STORE_BYTE
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; After scalarizing v4i8 loads is fixed.
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; XSI: BUFFER_LOAD_DWORD
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; XSI: V_BFE
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; XSI: V_ADD
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; XSI: V_ADD
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; XSI: V_ADD
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; XSI: BUFFER_STORE_DWORD
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; XSI: BUFFER_STORE_DWORD
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; SI: S_ENDPGM
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define void @test_copy_v4i8_extra_use(<4 x i8> addrspace(1)* %out0, <4 x i8> addrspace(1)* %out1, <4 x i8> addrspace(1)* %in) nounwind {
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%val = load <4 x i8> addrspace(1)* %in, align 4
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%add = add <4 x i8> %val, <i8 9, i8 9, i8 9, i8 9>
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out0, align 4
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store <4 x i8> %add, <4 x i8> addrspace(1)* %out1, align 4
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ret void
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}
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; FUNC-LABEL: @test_copy_v4i8_x2_extra_use
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; SI: BUFFER_LOAD_UBYTE
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; SI: BUFFER_LOAD_UBYTE
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; SI: BUFFER_LOAD_UBYTE
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; SI: BUFFER_LOAD_UBYTE
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; SI-DAG: V_ADD
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; SI-DAG: V_ADD
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; SI-DAG: V_ADD
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; SI-DAG: V_ADD
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI_DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI-DAG: BUFFER_STORE_BYTE
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; SI_DAG: BUFFER_STORE_BYTE
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; XSI: BUFFER_LOAD_DWORD
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; XSI: BFE
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; XSI: BUFFER_STORE_DWORD
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; XSI: V_ADD
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; XSI: BUFFER_STORE_DWORD
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; XSI-NEXT: BUFFER_STORE_DWORD
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; SI: S_ENDPGM
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define void @test_copy_v4i8_x2_extra_use(<4 x i8> addrspace(1)* %out0, <4 x i8> addrspace(1)* %out1, <4 x i8> addrspace(1)* %out2, <4 x i8> addrspace(1)* %in) nounwind {
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%val = load <4 x i8> addrspace(1)* %in, align 4
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%add = add <4 x i8> %val, <i8 9, i8 9, i8 9, i8 9>
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out0, align 4
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store <4 x i8> %add, <4 x i8> addrspace(1)* %out1, align 4
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out2, align 4
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ret void
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}
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; FUNC-LABEL: @test_copy_v3i8
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; SI-NOT: BFE
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; SI-NOT: BFI
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; SI: S_ENDPGM
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define void @test_copy_v3i8(<3 x i8> addrspace(1)* %out, <3 x i8> addrspace(1)* %in) nounwind {
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%val = load <3 x i8> addrspace(1)* %in, align 4
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store <3 x i8> %val, <3 x i8> addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @test_copy_v4i8_volatile_load
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; SI: BUFFER_LOAD_UBYTE
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; SI: BUFFER_LOAD_UBYTE
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; SI: BUFFER_LOAD_UBYTE
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; SI: BUFFER_LOAD_UBYTE
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; SI: S_ENDPGM
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define void @test_copy_v4i8_volatile_load(<4 x i8> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) nounwind {
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%val = load volatile <4 x i8> addrspace(1)* %in, align 4
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store <4 x i8> %val, <4 x i8> addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @test_copy_v4i8_volatile_store
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; SI: BUFFER_LOAD_UBYTE
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; SI: BUFFER_LOAD_UBYTE
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; SI: BUFFER_LOAD_UBYTE
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; SI: BUFFER_LOAD_UBYTE
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; SI: BUFFER_STORE_BYTE
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; SI: BUFFER_STORE_BYTE
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; SI: BUFFER_STORE_BYTE
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; SI: BUFFER_STORE_BYTE
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; SI: S_ENDPGM
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define void @test_copy_v4i8_volatile_store(<4 x i8> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) nounwind {
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%val = load <4 x i8> addrspace(1)* %in, align 4
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store volatile <4 x i8> %val, <4 x i8> addrspace(1)* %out, align 4
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ret void
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}
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