Saleem Abdulrasool 745fff806d ARM: partially handle 32-bit relocations for WoA ... IMAGE_REL_ARM_MOV32T relocations require that the movw/movt pair-wise relocation is not split up and reordered. When expanding the mov32imm pseudo-instruction, create a bundle if the machine operand is referencing an address. This helps ensure that the relocatable address load is not reordered by subsequent passes. Unfortunately, this only partially handles the case as the Constant Island Pass occurs after the instructions are unbundled and does not properly handle bundles. That is a more fundamental issue with the pass itself and beyond the scope of this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207608 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-30 04:54:58 +00:00
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AArch64	AArch64: Mark vector long multiplication as expand.	2014-04-29 09:37:54 +00:00
ARM	ARM: partially handle 32-bit relocations for WoA	2014-04-30 04:54:58 +00:00
ARM64	[ARM64]Fix a bug about incorrect operand order in an EXT instruction, which is introduced by r207485.	2014-04-29 07:51:19 +00:00
CPP
Generic
Hexagon
Inputs
Mips	Add Simple return instruction to Mips fast-isel	2014-04-29 17:57:50 +00:00
MSP430
NVPTX
PowerPC
R600	R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errors	2014-04-29 23:12:53 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86	Implement X86 code generation for musttail	2014-04-29 23:55:41 +00:00
XCore