Bill Wendling f4caf69720 The tLDR et al instructions were emitting either a reg/reg or reg/imm
instruction based on the t_addrmode_s# mode and what it returned. There is some
obvious badness to this. In particular, it's hard to do MC-encoding when the
instruction may change out from underneath you after the t_addrmode_s# variable
is finally resolved.

The solution is to revert a long-ago change that merged the reg/reg and reg/imm
versions. There is the addition of several new addressing modes. They no longer
have extraneous operands associated with them. I.e., if it's reg/reg we don't
have to have a dummy zero immediate tacked on to the SDNode.

There are some obvious cleanups here, which will happen shortly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 03:36:38 +00:00
2010-10-08 00:36:21 +00:00
2010-12-14 00:37:52 +00:00
2010-12-12 21:42:01 +00:00
2010-01-09 18:40:31 +00:00
2010-11-29 18:16:10 +00:00
2010-09-29 17:39:29 +00:00

\Low Level Virtual Machine (LLVM)
================================

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LLVM backend for 6502
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