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f52efce72d
llvm-6502/lib/Target/ARM/Disassembler
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Tim Northover f52efce72d ARM: implement MRS/MSR (banked reg) system instructions. 
These are system-only instructions for CPUs with virtualization
extensions, allowing a hypervisor easy access to all of the various
different AArch32 registers.

rdar://problem/17861345

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215700 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-15 10:47:12 +00:00
..
ARMDisassembler.cpp ARM: implement MRS/MSR (banked reg) system instructions. 2014-08-15 10:47:12 +00:00
CMakeLists.txt Cleaning up a bunch of pre-Visual C++ 2012 build hacks. 2014-03-04 09:23:33 +00:00
LLVMBuild.txt Prune dependency to MC from each target disassembler. 2014-07-24 11:45:11 +00:00
Makefile