Bill Wendling 2476e5d345 If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation on ... them. The DAG combiner expects that nodes that are transformed have one value result. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60857 91177308-0d34-0410-b5e6-96231b3b80d8		2008-12-10 22:36:00 +00:00
..
Alpha	Correct some thinkos in the expansion of ADD/SUB	2008-11-12 08:23:26 +00:00
ARM	Clean up some ARM GV asm printing out; minor fixes to match what gcc does.	2008-12-06 02:00:55 +00:00
CBackend
CellSPU	CellSPU:	2008-12-09 06:12:03 +00:00
CPP
Generic	For amusement, implement SADDO, SSUBO, UADDO, USUBO	2008-12-10 12:30:42 +00:00
IA64
Mips	Fix PR2667: add soft float support for sint_to_fp/uint_to_fp	2008-11-10 17:36:26 +00:00
PowerPC	Re-did 60519. It turns out Darwin's handling of hidden visibility symbols are a bit more complicate than I expected. Both declarations and weak definitions still need a stub indirection. However, the stubs are in data section and they contain the addresses of the actual symbols.	2008-12-05 01:06:39 +00:00
SPARC
X86	If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation on	2008-12-10 22:36:00 +00:00
XCore	Add support for ISD::TRAP to the XCore backend	2008-12-03 10:59:16 +00:00