Hal Finkel f6f8198d85 Use virtual base registers on PPC ... On PowerPC, non-vector loads and stores have r+i forms; however, in functions with large stack frames these were not being used to access slots far from the stack pointer because such slots were out of range for the signed 16-bit immediate offset field. This increases register pressure because we need a separate register for each offset (when the r+r form is used). By enabling virtual base registers, we can deal with large stack frames without unduly increasing register pressure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179105 91177308-0d34-0410-b5e6-96231b3b80d8		2013-04-09 17:27:09 +00:00
..
AArch64	AArch64: remove barriers from AArch64 atomic operations.	2013-04-08 08:40:41 +00:00
ARM	Reverting 178851 as it broke buildbots	2013-04-05 16:39:53 +00:00
CPP
Generic	XFAIL some of the generic CodeGen tests for Hexagon.	2013-03-25 21:04:16 +00:00
Hexagon	Hexagon: Enable SupportDebugInfomation and DwarfInSection flags.	2013-03-28 19:34:49 +00:00
Inputs	Revert "Adding DIImportedModules to DIScopes."	2013-03-28 02:44:59 +00:00
MBlaze	Remove unnecessary leading comment characters in lit-only file	2013-03-18 22:08:16 +00:00
Mips	[mips] Small update to the implementation of eh.return for Mips.	2013-04-02 23:02:07 +00:00
MSP430	Remove unnecessary leading comment characters in lit-only file	2013-03-18 22:08:16 +00:00
NVPTX
PowerPC	Use virtual base registers on PPC	2013-04-09 17:27:09 +00:00
R600	R600/SI: Add support for buffer stores v2	2013-04-05 23:31:51 +00:00
SI
SPARC	Compute correct frame sizes for SPARC v9 64-bit frames.	2013-04-09 04:37:47 +00:00
Thumb	Revert "Adding DIImportedModules to DIScopes."	2013-03-28 02:44:59 +00:00
Thumb2	SDAG: Handle scalarizing an extend of a <1 x iN> vector.	2013-03-07 05:47:54 +00:00
X86	Make the test/CodeGen/X86/win32_sret.ll reliable on any CPU by explicitly specifying the -mcpu	2013-04-05 17:05:56 +00:00
XCore	Remove unnecessary leading comment characters in lit-only file	2013-03-18 22:08:16 +00:00