llvm-6502/lib/Target/Alpha
Duncan Sands f7331b3dd7 Fold the adjust_trampoline intrinsic into
init_trampoline.  There is now only one
trampoline intrinsic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41841 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 14:10:23 +00:00
..
Alpha.h
Alpha.td For PR1336: 2007-04-16 14:06:19 +00:00
AlphaAsmPrinter.cpp Don't ignore the return value of AsmPrinter::doInitialization and 2007-07-25 19:33:14 +00:00
AlphaBranchSelector.cpp Drop 'const' 2007-05-03 01:11:54 +00:00
AlphaCodeEmitter.cpp Drop 'const' 2007-05-03 01:11:54 +00:00
AlphaInstrFormats.td No more noResults. 2007-07-21 00:34:19 +00:00
AlphaInstrInfo.cpp Add lengthof and endof templates that hide a lot of sizeof computations. 2007-09-07 04:06:50 +00:00
AlphaInstrInfo.h RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. 2007-05-18 00:05:48 +00:00
AlphaInstrInfo.td No more noResults. 2007-07-21 00:34:19 +00:00
AlphaISelDAGToDAG.cpp Enhance APFloat to retain bits of NaNs (fixes oggenc). 2007-08-31 04:03:46 +00:00
AlphaISelLowering.cpp Fold the adjust_trampoline intrinsic into 2007-09-11 14:10:23 +00:00
AlphaISelLowering.h More explicit keywords. 2007-08-02 21:21:54 +00:00
AlphaJITInfo.cpp
AlphaJITInfo.h
AlphaLLRP.cpp Drop 'const' 2007-05-03 01:11:54 +00:00
AlphaRegisterInfo.cpp Long live the exception handling! 2007-07-14 14:06:15 +00:00
AlphaRegisterInfo.h Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots. 2007-08-30 05:52:20 +00:00
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp long double patch 2 of N. Handle it in TargetData. 2007-08-03 20:20:50 +00:00
AlphaTargetMachine.h Added -print-emitted-asm to print out JIT generated asm to cerr. 2007-07-20 21:56:13 +00:00
Makefile
README.txt Readme 2007-03-31 15:05:44 +00:00

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html