llvm-6502/test/CodeGen
Lang Hames f793de7a23 Don't glue users to extract_subreg when selecting the llvm.arm.ldrexd
intrinsic - it can cause impossible-to-schedule subgraphs to be
introduced.

PR15053.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176777 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-09 22:56:09 +00:00
..
AArch64 Test case hygiene. 2013-03-09 18:25:40 +00:00
ARM Don't glue users to extract_subreg when selecting the llvm.arm.ldrexd 2013-03-09 22:56:09 +00:00
CPP
Generic
Hexagon Hexagon: Add patterns for zero extended loads from i1->i64. 2013-03-08 14:15:15 +00:00
MBlaze
Mips Test case hygiene. 2013-03-09 18:25:40 +00:00
MSP430
NVPTX [NVPTX] Disable vector registers 2013-02-12 14:18:49 +00:00
PowerPC Test case hygiene. 2013-03-09 18:25:40 +00:00
R600 Test case hygiene. 2013-03-09 18:25:40 +00:00
SI
SPARC
Thumb llvm/test/CodeGen/Thumb/iabs.ll: Add explicit -mtriple=thumb-unknown-unknown to appease win32 hosts. 2013-03-05 02:18:52 +00:00
Thumb2 SDAG: Handle scalarizing an extend of a <1 x iN> vector. 2013-03-07 05:47:54 +00:00
X86 Test case hygiene. 2013-03-09 18:25:40 +00:00
XCore