llvm-6502/test/CodeGen
Quentin Colombet ed400c7108 [X86][AVX512] Add patterns that match the AVX512 floating point register vbroadcast intrinsics.
Patch by Cameron McInally <cameron.mcinally@nyu.edu>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193422 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-25 18:04:12 +00:00
..
AArch64 [AArch64] Fix NZCV reg live-in bug in F128CSEL codegen. 2013-10-24 08:28:24 +00:00
ARM ARM: don't expand atomicrmw inline on Cortex-M0 2013-10-25 09:30:24 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips][msa] Added support for matching fexp2 from normal IR (i.e. not intrinsics) 2013-10-23 10:36:52 +00:00
MSP430 Make sure SP is always aligned on a 2 byte boundary 2013-10-24 09:32:31 +00:00
NVPTX [NVPTX] Switch from StrongPHIElimination to PHIElimination in NVPTXTargetMachine, and add some missing optimization passes to addOptimizedRegAlloc 2013-10-11 12:39:39 +00:00
PowerPC Update PPC loop tests after SCEV non-unit-stride checkin r193015. 2013-10-19 00:14:04 +00:00
R600 R600/SI: fix MIMG writemask adjustement 2013-10-23 02:53:47 +00:00
SPARC
SystemZ Replace sra with srl if a single sign bit is required 2013-10-17 11:16:57 +00:00
Thumb 17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets 2013-10-17 19:52:05 +00:00
Thumb2 MachineSink: Fix and tweak critical-edge breaking heuristic. 2013-10-14 16:57:17 +00:00
X86 [X86][AVX512] Add patterns that match the AVX512 floating point register vbroadcast intrinsics. 2013-10-25 18:04:12 +00:00
XCore