Mihai Popa f86e436fb9 The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instructions when they are used to write to the APSR. In this case, the destination operand should be APSR_nzcv, and the encoding of the target should be 0b1111 (same as for PC). In pre-UAL syntax, this form used the PC register as a textual target. This is still allowed for backward compatibility. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181705 91177308-0d34-0410-b5e6-96231b3b80d8		2013-05-13 14:10:04 +00:00
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AArch64	AArch64: implement ETMv4 trace system registers.	2013-04-03 12:31:29 +00:00
ARM	The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instructions when they are used to write to the APSR. In this case, the destination operand should be APSR_nzcv, and the encoding of the target should be 0b1111 (same as for PC). In pre-UAL syntax, this form used the PC register as a textual target. This is still allowed for backward compatibility.	2013-05-13 14:10:04 +00:00
MBlaze	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Mips	[mips] DSP-ASE move from HI/LO register instructions.	2013-04-18 00:52:44 +00:00
X86	Add CLAC/STAC instruction encoding/decoding support	2013-04-11 04:52:28 +00:00
XCore	[XCore] Add LDAPB instructions.	2013-05-05 13:36:53 +00:00